Cypress CY7C1041DV33 manual Address BHE, BLE, Data IO Data in Valid

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CY7C1041DV33

Switching Waveforms (continued)

Figure 7. Write Cycle No. 2 (BLE or BHE Controlled)

 

 

tWC

 

ADDRESS

 

 

 

BHE, BLE

tSA

tBW

 

 

 

 

 

 

tAW

tHA

 

 

 

 

 

tPWE

 

WE

 

 

 

 

 

tSCE

 

CE

 

 

 

 

 

tSD

tHD

DATAIO

 

 

 

Figure 8. Write Cycle No. 3 (WE Controlled, OE HIGH During Write)[19, 20]

 

 

tWC

 

ADDRESS

 

 

 

 

 

tSCE

 

CE

 

 

 

 

tAW

 

tHA

 

tSA

tPWE

 

WE

 

 

 

OE

 

 

 

BHE, BLE

 

tSD

 

 

 

tHD

 

 

 

DATA IO

NOTE 21

DATAIN VALID

 

 

t

 

 

 

HZOE

 

 

Note

21. During this period the IOs are in the output state and input signals should not be applied.

Document #: 38-05473 Rev. *E

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Contents Features Logic Block DiagramFunctional Description Cypress Semiconductor Corporation 198 Champion CourtDescription Industrial Automotive2 Unit Pin ConfigurationSelection Guide Operating Range DC Electrical CharacteristicsMaximum Ratings Capacitance6 Thermal Resistance6AC Test Loads and Waveforms Description Test Conditions Max UnitAC Switching Characteristics Over the Operating Range8 Write Cycle12Data Retention Characteristics Over the Operating Range Switching WaveformsData Retention Waveform Parameter Description Conditions14 MinBHE, BLE HighData OUT High Impedance Data Valid IiccAddress BHE, BLE Data IO Data in ValidData IO IO8-IO15 Mode PowerTruth Table Ordering Information Package DiagramsOrdering Code Package Package Type Operating Diagram Range Pin 400-mil Molded SOJ Document History Sales, Solutions, and Legal Information USB