CY14E256L
256 Kbit (32K x 8) nvSRAM
Features
■25 ns, 35 ns, and 45 ns access times
■Pin compatible with STK14C88
■Hands off automatic STORE on power down with external 68 µF capacitor
■STORE to QuantumTrap™ nonvolatile elements is initiated by software, hardware, or AutoStore™ on power down
■RECALL to SRAM initiated by software or power up
■Unlimited READ, WRITE, and RECALL cycles
■1,000,000 STORE cycles to QuantumTrap
■100 year data retention to QuantumTrap
■Single 5V+10% operation
■Commercial and industrial temperature
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■RoHS compliance
Functional Description
The Cypress CY14E256L is a fast static RAM with a nonvolatile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent, nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the nonvolatile elements (the STORE operation) takes place automatically at power down. On power up, data is restored to the SRAM (the RECALL operation) from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control. A hardware STORE is initiated with the HSB pin.
Logic Block Diagram |
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| VCC | VCAP |
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| Quantum Trap |
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| 512 X 512 |
| POWER |
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A5 |
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| STORE |
| CONTROL |
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A6 | DECODER |
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A7 |
| RECALL |
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A8 |
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A9 | STATIC RAM |
| RECALL | HSB |
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| ARRAY |
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A11 |
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ROW |
| 512 X 512 |
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A12 |
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A13 |
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A14 |
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| SOFTWARE |
| A13 - A0 |
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| DETECT |
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DQ0 |
| COLUMN I/O |
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DQ1 | BUFFERS | COLUMN DEC |
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DQ2 |
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DQ3 |
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DQ4 |
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INPUT |
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DQ5 | A0 A1 A2 A3 A4 A10 |
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DQ6 |
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DQ7 |
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| OE |
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| CE |
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| WE |
Cypress Semiconductor Corporation | • | 198 Champion Court | • | San Jose, CA | • | |||
Document Number: |
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| Revised January 30, 2009 |
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