Connect Tech Inc. FreeForm/Express S6 - PCIe
Pin Number | Signal Name | Pin Name | IO Standard | Bank | |
|
|
|
|
| |
K4 | ddr3_ck_p | IO_L46P_M3CLK_3 | DIFF_SSTL15_II | 3 | |
|
|
|
|
| |
F2 | ddr3_cke | IO_L53P_M3CKE_3 | SSTL15_II | 3 | |
|
|
|
|
| |
N4 | ddr3_dm | IO_L42N_GCLK24_M3LDM_3 | SSTL15_II | 3 | |
|
|
|
|
| |
R3 | ddr3_dq<0> | IO_L37P_M3DQ0_3 | SSTL15_II | 3 | |
|
|
|
|
| |
R1 | ddr3_dq<1> | IO_L37N_M3DQ1_3 | SSTL15_II | 3 | |
|
|
|
|
| |
P2 | ddr3_dq<2> | IO_L38P_M3DQ2_3 | SSTL15_II | 3 | |
|
|
|
|
| |
P1 | ddr3_dq<3> | IO_L38N_M3DQ3_3 | SSTL15_II | 3 | |
|
|
|
|
| |
L3 | ddr3_dq<4> | IO_L41P_GCLK27_M3DQ4_3 | SSTL15_II | 3 | |
|
|
|
|
| |
L1 | ddr3_dq<5> | IO_L41N_GCLK26_M3DQ5_3 | SSTL15_II | 3 | |
|
|
|
|
| |
M2 | ddr3_dq<6> | IO_L40P_M3DQ6_3 | SSTL15_II | 3 | |
|
|
|
|
| |
M1 | ddr3_dq<7> | IO_L40N_M3DQ7_3 | SSTL15_II | 3 | |
|
|
|
|
| |
T2 | ddr3_dq<8> | IO_L36P_M3DQ8_3 | SSTL15_II | 3 | |
|
|
|
|
| |
T1 | ddr3_dq<9> | IO_L36N_M3DQ9_3 | SSTL15_II | 3 | |
|
|
|
|
| |
U3 | ddr3_dq<10> | IO_L35P_M3DQ10_3 | SSTL15_II | 3 | |
|
|
|
|
| |
U1 | ddr3_dq<11> | IO_L35N_M3DQ11_3 | SSTL15_II | 3 | |
|
|
|
|
| |
W3 | ddr3_dq<12> | IO_L33P_M3DQ12_3 | SSTL15_II | 3 | |
|
|
|
|
| |
W1 | ddr3_dq<13> | IO_L33N_M3DQ13_3 | SSTL15_II | 3 | |
|
|
|
|
| |
Y2 | ddr3_dq<14> | IO_L32P_M3DQ14_3 | SSTL15_II | 3 | |
|
|
|
|
| |
Y1 | ddr3_dq<15> | IO_L32N_M3DQ15_3 | SSTL15_II | 3 | |
|
|
|
|
| |
N1 | ddr3_dqs_n | IO_L39N_M3LDQSN_3 | DIFF_SSTL15_II | 3 | |
|
|
|
|
| |
N3 | ddr3_dqs_p | IO_L39P_M3LDQS_3 | DIFF_SSTL15_II | 3 | |
|
|
|
|
| |
L6 | ddr3_odt | IO_L45N_M3ODT_3 | SSTL15_II | 3 | |
|
|
|
|
| |
M5 | ddr3_ras_n | IO_L43P_GCLK23_M3RASN_3 | SSTL15_II | 3 | |
|
|
|
|
| |
E3 | ddr3_reset_n | IO_L54P_M3RESET_3 | LVCMOS15 | 3 | |
|
|
|
|
| |
P3 | ddr3_udm | IO_L42P_GCLK25_TRDY2_M3UDM_3 | SSTL15_II | 3 | |
|
|
|
|
| |
V1 | ddr3_udqs_n | IO_L34N_M3UDQSN_3 | DIFF_SSTL15_II | 3 | |
|
|
|
|
| |
V2 | ddr3_udqs_p | IO_L34P_M3UDQS_3 | DIFF_SSTL15_II | 3 | |
|
|
|
|
| |
H2 | ddr3_we_n | IO_L50P_M3WE_3 | SSTL15_II | 3 | |
|
|
|
|
| |
G11 | fmc_clk0_m2c_n | IO_L35N_GCLK16_0 | LVDS_25 | 0 | |
|
|
|
|
| |
H12 | fmc_clk0_m2c_p | IO_L35P_GCLK17_0 | LVDS_25 | 0 | |
|
|
|
|
| |
F16 | fmc_clk1_m2c_n | IO_L37N_GCLK12_0 | LVDS_25 | 0 | |
|
|
|
|
| |
E16 | fmc_clk1_m2c_p | IO_L37P_GCLK13_0 | LVDS_25 | 0 | |
|
|
|
|
| |
A8 | fmc_dp0_c2m_n | MGTTXN1_101 |
|
| |
|
|
|
|
| |
B8 | fmc_dp0_c2m_p | MGTTXP1_101 |
|
| |
|
|
|
|
| |
C9 | fmc_dp0_m2c_n | MGTRXN1_101 |
|
| |
|
|
|
|
| |
D9 | fmc_dp0_m2c_p | MGTRXP1_101 |
|
| |
|
|
|
|
| |
D11 | fmc_gbtclk0_m2c_n | MGTREFCLK1N_101 |
|
| |
|
|
|
|
| |
C11 | fmc_gbtclk0_m2c_p | MGTREFCLK1P_101 |
|
| |
|
|
|
|
| |
T5 | fmc_i2c_scl | IO_L7N_3 | LVCMOS15 | 3 | |
|
|
|
|
| |
T6 | fmc_i2c_sda | IO_L7P_3 | LVCMOS15 | 3 | |
|
|
|
|
|
Revision 0.01 | 20 |