Motorola M6800 manual SWI Instruction

Page 19

MPU-19

SWI INSTRUCTION

1.Contents of the MPU registers PC, 1X, ACCA, ACCB and CC are stored in RAM at the address indicated by the stack pointer in descending location (7 bytes in all).

2.The IRQ mask (bit I = 1) is set.

3.Data at FFFA gets loaded into PCH.

4.Data at FFFB gets loaded into PCL.

5.PC contents go out on address bus during Ø1.

6.Contents of cell addressed enters instruction register during Ø2 and is decoded as first instruction of SWI subroutine.

7.If it is a more than one byte instruction, additional bytes enter MPU for execution. If not, go to next step.

8.After execution, Step 6 is repeated for subsequent instructions. This loop is repeated until the instruction "RTI" is executed.

Image 19
Contents MPU-1 Introduction MPU-2 MPU-3 MPU-4 MPU-5 BIT N0 Function MPU-7 Valid Memory Addressvma Data BUS EnabledbeMPU-8 READ/WRITE R/WNON-MASKABLE Interruptnmi MPU-9BUS Available BA Address BUS AO/A15 THREE-STATE Control TSCINX ABAINS ADCPage MPU-14 Summary of MPU Operation Reset Sequence IRQ Sequence RTI Execution NMI SequenceSWI Instruction Page Page Page Page Page Page Page Page