Motorola 68HC08LD manual POD Target Layout, 34 36 38 40 42 44 46 33 35 37 39 41 43 45

Page 10

POD Target Layout

The POD Target Layout is T_QFP64.

15	13	11	9	7	5	3	1
16	14	12	10	8	6	4	2

1718

1920

2122

2324

2526

2728

2930

3132

34 36 38 40 42 44 46 48

33 35 37 39 41 43 45 47

T_QFP64 – Bottom POD View

T_QFP64 – Dimensions (Top View)

6463

6261

6059

5857

5655

5453

5251

5049

 iSYSTEM, March 2004

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Image 10

Contents Motorola 68HC08LD POD rev. B POD Hardware ReferenceIn-Circuit Emulation PODs Final Target Application Test Top board CPU Mask Information Emulated CPUElectrical and Logical Differences Clock SettingsAnalog/Digital Converter Position Vcc level Voltage settingsPorts Jumper Set RemovedGeneral HC08 Emulation Notes Internal RAM, Internal EepromSignal Connector Target AdaptersPOD Target Layout 34 36 38 40 42 44 46 33 35 37 39 41 43 45 iSYSTEM, March 11/12  iSYSTEM, March 12/12