Motorola 68HC08LD manual In-Circuit Emulation PODs

Page 2

POD Hardware Reference

In-Circuit Emulation PODs

The following elements of interest are located on all In-Circuit emulation PODs:

emulation CPU - acts on behalf of target's CPU. On some PODs you must use the same CPU on the POD as it is used on the target (see your POD reference page). In such cases, remove the CPU from the POD and insert the CPU that you use in the target system, in its place.

red LED (D3) - lit when CPU is running

green LED (D4) - lit when Emulator is ready for emulation

a connector, mostly marked ST3 - contains signal lines, some of which are hardware configuration lines (such as bank select signals), others you can use for signal generation (pattern generator outputs).

Here are some common signals found on the signal connector, commonly marked as ST3:

GND

Ground

BPE

External breakpoint input. Active high.

RESO/RO

Reset output. Connect to target to reset peripherals.

TRES/TR

Target reset input.

AUXn

AUX signal inputs (same as inputs on Emulator/trace)

Note: On PODs that support synchronization between two or more Emulators (currently only the HC(S)12 Family, see the Synchronization section in the Hardware User's Guide for more information) AUX0 and AUX1 are cut short with Run/Stop synchronization line, and AUX2, AUX3 with RESET synchronization line. You should use these pins to connect to other PODs or target CPUs.

PAT0-2 Pattern generator output on 16-bit POD

OC4-6 Pattern generator output on 8-bit POD

Note: The signal connector can also have other markings, like P1, U1, etc. Please refer to the POD-specific documentation for the signal connector name and signals present.

 iSYSTEM, March 2004

2/12

Image 2
Contents Motorola 68HC08LD POD rev. B POD Hardware ReferenceIn-Circuit Emulation PODs Final Target Application Test Top board CPU Mask Information Emulated CPUAnalog/Digital Converter Clock SettingsElectrical and Logical Differences Position Vcc level Voltage settingsPorts Jumper Set RemovedGeneral HC08 Emulation Notes Internal RAM, Internal EepromSignal Connector Target AdaptersPOD Target Layout 34 36 38 40 42 44 46 33 35 37 39 41 43 45 iSYSTEM, March 11/12  iSYSTEM, March 12/12