Chapter 5: Key Protocols and Interfaces
32-bit or 64-bit PCI Bus Master
ASIC with Embedded RISC Processor
Compliant with PCI Local Bus Rev 2.2, the PCI interface on the Gigabit Ethernet Adapter is compatible with both 32-bit and 64-bit PCI buses. As a bus master, the adapter requests access to the PCI bus, instead of waiting to be polled.
The core control for the Gigabit Ethernet Adapter resides in a tightly integrated, high-performance ASIC. The ASIC includes dual RISC processors. This provides the flexibility to add new features to the card and adapt it to future network requirements via a software download. This also enables the adapter drivers to exploit the built-in host offload functions on the adapter as host operating systems are enhanced to take advantage of these functions.