Texas Instruments DAC3482, DAC3484 installation instructions Output Control Options

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Software Control

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NCO: allows fine mixing of the I/Q signal. The procedure to adjust the NCO mixing frequency are listed below:

1.Enter the DAC sampling frequency in Fsample.

2.Enter the desired mixing frequency in both NCO freq_AB and NCO freq_CD.

3.Press Update freq

4.Sync the NCO block from the following options:

REGWR: auto-sync from SIF register write. Writing to either Phase OffsetAB or Phase OffsetCD can create a sync event.

OSTR: sync from the external LVPECL OSTR signal. Clock divider sync must be enabled with OSTR set as sync source. Refer to the datasheet for OSTR period requirement.

SYNC: sync from the external SYNC signal

SIF SYNC: sync from SIF Sync. Uncheck and check the SIF Sync button for sync event.

2.2.3Output Control Options

Figure 5. Output Control Options

Output Options: allows the configuration of reference, output polarity, and output delay

Data Routing: provides flexible routing of the A, B, C, and D digital path to the desired output channels.

Note: The DAC3482 does not support this mode.

DAC Gain: configures the full-scale DAC current and DAC3484/DAC3482 mode. With Rbiaj resistor set at 1.28kΩ:

O DAC Gain = 15 for 30mA full-scale current.

ODAC Gain = 10 for 20mA full-scale current (default). O DAC3484 = QDAC

O DAC3482 = DDAC

This allows the DAC3484 to be configured as DAC3482 (see Using DAC3484 as DAC3482 section for detail)

DAC Sel = Enable inner outputs of Ch. B and Ch. C as the DAC3482 output.

DAC Sel = Enable outer outputs of Ch. A and Ch. D as the DAC3482 output. Outer channels are grounded for the DAC3482 device.

Output Shutoff On: allows outputs to shut-off when DACCLK GONE, DATACLK GONE, or FIFO COLLISION alarm event occurs.

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DAC3484/DAC3482 EVM

SLAU336 –March 2011

 

 

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Contents DAC3484/DAC3482 EVM EVM Block Diagram OverviewInstallation Instructions Software OperationInput Control Options Lvds Delay Settings Digital Block Options Output Control Options CDCE62005 Tab Configured for 4x Interpolation CDCE62005Test Block Diagram Miscellaneous SettingsRegister Control Test Set-Up Connection TSW3100 Quick Start OperationTSW3100 CommsSignalPattern Wcdma Programming GUI DAC348x Software Quick Start GuideDAC3484 + TRF3703-15 Wcdma Output Optional Configuration Locations of DAC348x to Transformer Output Jumper Locations DAC3484 Transformer Coupled Output at 60MHz if Using the DAC3482 or Configuring DAC3484 in DAC3482 mode DAC3484 Transformer Coupled Output at 30MHz ifLocations of the DAC3482 to TRF3703-15 Interface Jumpers Submit Documentation Feedback Evaluation Board/Kit Important Notice FCC WarningEVM Warnings and Restrictions Important Notice