LG Electronics 37LC2D(B) BLOCK DIAGRAMJack, Audio/Vi Deo Sw, CXA2069Q, Sound processor, MSP4410K

Page 31
BLOCK DIAGRAM(Jack)

BLOCK DIAGRAM(Jack)

 

 

 

 

 

 

 

AV Side

 

Jack Component

 

 

 

 

SCART RGB

TV out V

 

 

CVBS Audio

VLR

 

 

 

 

YPbPr

 

 

 

 

AV1

VLR

 

AUDIO/VI DEO SW

CXA2069Q

 

 

Audio LR

 

Main V/YC

FFC Wafer

 

VLR,YC

 

 

 

Sub V/YC

 

AV2 DTV

 

8Pin Rec ord

MNT VLR

 

 

 

 

 

 

 

8Pin Rec ord

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DTV V_out

 

TV LR

AV LR

 

 

 

 

 

 

FFC

 

 

 

 

 

 

 

 

 

 

 

 

out

 

 

 

TVout L R

 

Sound processor

 

 

 

 

 

EPF

 

WaferFFC

 

 

 

 

 

 

MSP4410K

 

 

 

 

 

 

 

 

 

VLR, YC

 

 

 

 

 

LR

 

 

 

 

 

 

 

 

 

 

I2S DTV/HDMI

AV3

 

 

Audio LR

 

 

 

 

MSP_SPDIF

 

 

 

 

 

 

 

 

In

IR

 

 

WIRE_IR_in

 

 

 

 

 

 

 

 

Wafer

 

 

WIRE_IR_out

 

 

 

 

 

 

 

 

out

IR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PC_RGB

 

audio

RGB in RGB

 

 

 

 

 

 

LR

I2S

Digital s ound processor

NSP-2110A

 

 

Digital AMP

 

 

 

 

 

 

 

 

out o Audi

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Image 31
Contents SERVICE MANUAL READ THE SAFETY PRECAUTIONS IN THIS MANUALCHASSIS LD61A FACTORY NAME 32LC2DB-EC/37LC2DB-EC/42LC2DB-EC BEFORE SERVICING THE CHASSISSPECIFICATION CONTENTSCONTENTS PRODUCT SAFETYLeakage Current Hot Check circuit SAFETY PRECAUTIONSIMPORTANT SAFETY NOTICE General GuidanceElectrostatically Sensitive ES Devices SERVICING PRECAUTIONSPower Output, Transistor Device Removal/Replacement IC Remove/ReplacementReplacement Small-Signal Discrete Transistor Removal/Replacement1.General SpecificationTV SPECIFICATIONreatment of the front polarizer 2. General Specification4.Component Video Input Y, PB, PR 3.Optical FeatureLCD Module6. RGB DTV INPUT Mode Table 5. RGB PC INPUT Mode TableRGB-PC EDID DATA 8. HDMI DTV Mode Table 7. HDMI INPUT Mode TableHDMI EDID DATA Table 1 Scart Arrangement 1.Full Scart 7. Mechanical specification8. Mechanical specification 32LC2DTable 2 Scart Arrangement 2.Half Scart 3. Channel Memory ADJUSTMENT INSTRUCTION2. Specification 1. Application RangePanel size selection 5. Select method of Panel size6. ADC Calibration Before AV ADC Calibration, should be executed theCool11000K - x 0.274±0.003, y 0.286±0.003 7. White BalanceBefore White-balance, the AV ADC should be done Case1 EC and FC model use PAL-BGDHI composite signalFUNTION SVC REMOCONTROUBLESHOOTING No image attached? Is the input cableNo image PASS No image No image No image No image No image AV1,AV2 ,AV3 TROUBLESHOOTING AV1, 2, 3, 4/S-VideoVolume level Of AV4/S-Video L/R signalTROUBLESHOOTING DTV/HDMI-Audio TROUBLESHOOTING RF/Component/PC FFC Wafer BLOCK DIAGRAMMainTDFB-G236P DVB/PAL WaferSound processor BLOCK DIAGRAMJackAUDIO/VI DEO SW CXA2069Q010 020050 EXPLODED VIEW32LC2DDESCRIPTION EXPLODED VIEW PARTS LIST32LC2DEXPLODED VIEW37LC2D EXPLODED VIEW PARTS LIST37LC2D 020080 130030 150 090 EXPLODED VIEW42LC2DEXPLODED VIEW PARTS LIST42LC2D MAIN BOARD REPLACEMENT PARTS LISTCAPACITOR DATE 2006. 05 DATE 2006. 05 DATE 2006. 05 DIODEs COIL & CORE & INDUCTOR RESISTORs TRANSISTORDATE 2006. 05 DATE 2006. 05 DATE 2006. 05 DATE 2006. 05 JACK BOARD OTHERsDATE 2006. 05 COIL & CORE & INDUCTOR DIODEsRESISTORs TRANSISTORDATE 2006. 05 CONTROL BOARD IR/LED BOARD SIDE A/V BOARDPage Page Page Page Page Printed in Korea P/NO 38289S0043