I-Tech Company WBX-6200F-V user manual Uncompressed Initialization Codes The following runtime

Page 46

FF

Flash ROM programming was successful. Next, restarting the system BIOS.

Uncompressed Initialization Codes — The following runtime

checkpoint hex codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM.

 

Code

 

 

Description

 

03

 

The NMI is disabled. Next, checking for a soft reset or a power on

 

condition.

 

 

 

05

 

The BIOS stack has been built. Next, disabling cache memory.

06

 

Uncompressing the POST code next.

07

 

Next, initializing the CPU and the CPU data area.

08

 

The CMOS checksum calculation is done next.

 

0B

Next, performing any required initialization before the keyboard

 

BAT command is issued.

 

 

 

 

0C

The keyboard controller input buffer is free. Next, issuing the

 

BAT command to the keyboard controller.

 

 

 

 

 

 

The keyboard controller BAT command result has been verified.

 

0E

Next, performing any necessary INIT after the K/B controller BAT

 

 

 

command test.

 

0F

The keyboard command byte is written next.

10

 

Next, issuing the pin 23 and 24 blocking and unblocking

 

commands.

 

 

 

 

Code

 

 

Description

 

11

 

Next, checking if the <End> or <Ins> keys were pressed during

 

power on.

 

 

 

 

 

 

To initialize CMOS if the initialize CMOS RAM in every boot is set

12

 

or the

 

<End> key is pressed. Going to disable DMA and Interrupt

 

 

 

 

 

 

controllers.

13

 

The video display has been disabled. Port B has been initialized.

 

Next, initializing the chipset.

 

 

 

14

 

The 8254 timer test will begin next.

19

 

The 8254 timer test is over. Starting the memory refresh test

 

next.

 

 

 

 

1A

The memory refresh line is toggling. Checking the 15us on/off

 

time next.

 

 

 

 

 

 

Reading the 8042 input port and disabling the MEGAKEY Green

23

 

PC feature next. Making the BIOS code segment writable and

 

performing any necessary configuration before initializing the

 

 

 

 

 

 

interrupt vectors.

 

 

 

The configuration or setup required before interrupt vector

24

 

initialization has completed. Interrupt vector init. is about to

 

 

 

begin

 

 

 

 

 

 

37

Image 46
Contents WBX-6200F-V Copyright Notice Technology CorpSafety Precautions Page Acknowledgments (This page does not contain any information) Table of Contents Appendix B. System Assembly Reference How to Use This Manual Features Introduction„ Bios Parts Specifications System SpecificationCPU System View CF interface Pcmcia interfaceConnectors Unpacking Setting Up the System Getting StartedMethod 2 Use the COM or Parallel Port Installing System SoftwareMethod 1 Use the Ethernet Method 3 Use a External CD-ROMInstalling the Drivers Bios Setup Information Entering SetupKeys to navigate within setup menu Functions Main Menu Standard Cmos Setup Menu„ Menu selections Options Description Advanced Cmos Setup Bios Setup Items Failsafe Other Options DefaultPage Other Options Items Default Advanced Chipset SetupBios Setup Sdram CAS#Other Default Options IRQ14 IRQ11IRQ13 IRQ15CRT LCD CRT+LCD CRT+TV DVI DVI+CRT PCI / Plug and Play SetupBios Setup Optimal Failsafe Other Items Default Options Ntsc PAL, PalmFailsafe Other Default Options Peripheral Setup DefaultsEPP, EPP+ECP Quick Boot Advanced Cmos Setup MenuHardware Monitor Setup Defaults 1st Boot Device / 2nd Boot Device / 3rd Boot DeviceUSB FDD, USB CDROM, USB HDD, USB RMD-FDD, USB RMD-HDD Try Other Boot DeviceBoot Up Num-Lock A.R.T for Hard DisksSystem Keyboard Password CheckBoot To OS/2 Primary DisplayConfigure Sdram Timing by SPD Advanced Chipset Setup MenuSystem Bios Cacheable L2 CacheSdram CAS# Latency Sdram Command RateSdram Frequency Sdram Bank InterleaveUSB Controller HDD Udma Mode ControlWDT Timer Control USB Device Legacy SupportPower Management Setup Menu Throttle Slow Clock Ratio Standby Time out MinuteSuspend Time out Minute Display ActivityResume On RTC Alarm Power Button FunctionRestore On AC/Power Loss RTC Alarm Date / Hour/ Minute / SecondPlug and Play Aware O/S PCI/Plug and Play SetupClear Nvram Peripheral Setup FIR DMA1 Select On Board FIR PortFIR IRQ Select On Board Parallel PortECP Parallel Port ModeEPP EPP VersionHardware Monitor Setup Bios Post Check Point List Code DescriptionInitializing the DMA controller, performing the keyboard BAT command to the keyboard controller Uncompressed Initialization Codes The following runtimePost Soft reset next Bios Post Flash Bios Utility Coprocessor testPage Appendix A. Jumper Setting Connectors List of CPU Board Jumpers Location and listJumper List Jumper SettingTable Jumper Setting Example Notation Description IllustrationLCD Panel Power select JP4 RTC Cmos Clear Jumper Setting JP1Touch Screen configuration JP2 DVI Port configuration JP5Connector Definitions Connectors LocationPage Connectors List COM1CN3 KB/MS CN1CN2 MINI-DINGpio Connector J2 Pin head on MB PIN No Signal Description HDD Power Connector Reset Button J1Signal Description Internal VGA Connector J3-optional PIN No Name DescriptionTouch Pad Interface J8 PIN No Signal Description Inverter power connector J7 PIN No Name DescriptionPIN No Name Description CLK RST# INTB# INTA#3VAUX REQ# GNT#CPU Fan Connector J10 PIN No Signal DescriptionPCI Slot J11 PIN No Signal Description INTR#A INTR#B INTR#C RESET#INTR#D REQ#3Power Bottom J12 PIN No Name Description Power & HDD LED J13 PIN No Name DescriptionSystem Fan Connector J18 PIN No Name LED State Power HDD Active S1, S3 Off GreenVGA connector J15 PIN No Name Description RedPCIRST# DVI Port J21 PIN No Signal DescriptionAMP OUTR+ AMP OUTL+ AMP Outr AMP Outl Dvihsync Dvivsync Dviclk Tvclkr Dvidet SPCLK2 SPD2Internal USB Port J24 PIN No Name Power Jack Connector CN1 PIN No Name DescriptionAudio Jack Line-out, Line-in, Micro CN2 485 PIN No Signal Description COM2 Pin Definition CN4 RS-232 PIN No Signal Description422 PIN No Signal Description KB/MS 6 pin MINI-DIN female CN3 PIN No Name DescriptionUSB a Port 0/1 CN8 PIN No Name Description RS-232 PIN No Signal DescriptionUSB a Port 2/3 CN7 PIN No Name Description TTL Interface pin assignment CN10CN 12 for Lvds second Channel PIN No. Signal Description LVDS1 Panel Connector CN11/CN12 PIN No Signal DescriptionCkin CKIN+ Primary IDE Connector IDE1 PIN No Signal Description Secondary IDE Connector IDE2 PIN No Signal Description TX+ RJ45 LAN connector LAN1 PIN No Name DescriptionInternal LPT Port LPT PIN No Signal Description RX+HDD Power Connector PJ1 PIN No Name VCC GNDLED CF interfaceGpio Bracket Pcmcia / CPU Bottom Bracket CPU-A

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