Roper PXD1000 manual

Page 19

Image data as transferred directly to system memory from a Dalsa CA-D4 two- channel camera and 2b after hardware reordering into scan line order by a frame grabber.

To alleviate this problem, many digital frame grabbers incorporate pixel swizzling circuitry to dynamically rearrange the pixels into scan line order so that the application can immediately begin the image-processing task.

Differeent cameras employ a number of different image-formatting schemes. The most common are shown in Figure 4.

Figure 4.

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Contents Purchase from Imagenation Build your own cable Camera Configuration Files & GuidesPXD Data Page Page Data connector J2 Build from cable with compatible FG connector I/O Connector OptionalCable kit CB-012-00 Cable kit CB-011-00 Making a data cable for 11-bit to 32-bit CamerasBuild from cable with compatible Camera connector PXD Configuration Application Enter Pixel clock speed from the camera specification Relationship to various pins Output formats/standards i.e. RS422, TTL, LDVS? Triggers methods and options WEN SignalData line Options Modes 8x1, 8x2 ChannelInput Look-up Tables LUTs Burst PCI Rate versus Sustained PCI RateEIA422-B vs. EIA-644 Frame RatePixel Clock Source Pixel Swizzling Page Scatter/Gather ResolutionSymptom Possible Cause/SolutionSymptoms Graduations have stripes