Icom IC-F3GT, IC-F3GS service manual Ptt

Page 51

4-5 PORT ALLOCATIONS

4-5-1 CPU (IC8)

Pin

Port

Description

 

 

number

name

 

 

 

 

 

 

 

 

 

1

VIN

Input port for battely voltage detection.

 

 

 

 

 

9

RESET

Input port for RESET signal.

 

 

 

 

 

 

 

 

11

CSIFT

Outputs reference

oscillator

for

the

CPU control signal.

 

 

 

 

 

 

 

 

 

 

 

 

 

12

SCK

Outputs clock signal to the

PLL

IC

(IC1), EEPROM (IC7), etc.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

• Outputs strobe

signals

to

the

15

DAST

expander IC (IC10, pin 6).

 

 

• Input port for the initial version sig-

 

 

 

 

nal.

 

 

 

 

 

 

 

16

CLIN

Input port for the cloning signal.

 

 

 

 

 

 

17

CLOUT

Outputs the cloning signal.

 

 

 

 

 

18

PLST

Outputs strobe signals to the PLL IC

(IC1, pin 3).

 

 

 

 

 

 

 

 

 

 

 

19

NOIS

Input for for noise signals (pulse type).

 

 

 

 

 

21

BUSY

Outputs BUSY detection.

 

 

Low: The channel is busy.

 

 

 

 

 

 

 

 

 

26, 36,

OPV1–3

Input port for the optional unit detec-

37

tion signal from J5.

 

 

 

 

 

 

 

 

 

Outputs Wide/Narrow mode

control

38

NWC

signal.

 

 

 

 

 

High: Wide mode is selected.

 

 

 

 

 

 

 

44–47

KR3–

Output ports for key matrix.

 

 

KR0

Low: When the key is pushed.

 

 

 

 

 

 

 

 

 

• Outputs RX mute control signal.

 

49

RMUT

• Input port for the RX mute signal

 

 

from optional units.

 

 

 

 

 

 

 

 

• Output TX mute control signal.

 

50

MMUT

• Input port for the TX mute signal

 

 

from optional units.

 

 

 

 

 

 

 

Outputs low-pass filter cut-off frequen-

51

DUSE

cy control signal when DTCS is acti-

 

 

vated.

 

 

 

 

 

 

52

S5C

Outputs S5 regulator control signal.

Low: While power is ON.

 

 

 

 

 

 

 

 

 

53

R5C

Outputs R5 regulator control signal.

Low: While receiving.

 

 

 

 

 

 

 

 

 

54

T5C

Outputs T5 regulator control signal.

Low: While transmitting.

 

 

 

 

 

 

 

 

 

 

55

TXC

Outputs APC circuit control signal.

 

High: While transmitting.

 

 

 

 

 

 

 

 

 

 

 

Outputs control signal for the regulator

56

AFON

circuit of AF power amplifier.

 

 

 

 

High: When squelch is open, etc.

 

 

 

 

57

LIGT

Outputs LCD backlight control signal.

High: Lights ON.

 

 

 

 

 

 

 

 

 

 

 

58

ESCK

Outputs EEPROM (IC7, pin 6) clock

signal.

 

 

 

 

 

 

 

 

 

 

 

59

ESDA

I/O port for data signals from/to EEP-

ROM (IC7, pin 5)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CPU (IC8)–continued

Pin

Port

Description

number

name

 

 

 

 

 

 

Input port for unlock signal.

63

UNLK

High: PLL is unlocked.

 

 

Low: PLL is locked.

 

 

 

 

 

Output port for:

90

MTONE

Beep audio while receiving.

 

 

2/5-tone signals while transmitting.

 

 

 

91

DTMF

Outputs DTMF tone signal while trans-

mitting.

 

 

 

 

 

94

CTCIN

CTCSS/DTCS signals input port for

decording.

 

 

 

 

 

95

PTT

Input port for the [PTT] switch.

High: While [PTT] switch is pushed.

 

 

 

 

 

96

BDET

Input port for the battery’s type detec-

tion.

 

 

 

 

 

97

REMO

Input port for the remote-control signal

from external MIC (HM-75).

 

 

 

 

 

98

SD

Input port for the RSSI detection.

 

 

 

99

LVIN

Input port for the PLL lock voltage.

 

 

 

100

TEMP

Input port for the transceiver’s internal

temperature detection.

 

 

 

 

 

4-5-2 OUTPUT EXPANDER IC (IC10)

Pin

Port

Description

number

name

 

 

 

 

2, 3,

T1–T4

Output tunable bandpass filter control

10, 11

signals.

 

 

 

 

6

DAST

Input port for strobe signal from the

CPU (IC8, pin 15).

 

 

 

 

 

7

SCK

Input port for clock signal from the

CPU (IC8, pin 12).

 

 

 

 

 

4 - 5

Image 51
Contents VHF FM Transceivers Introduction Ordering PartsRepair Notes Table of Contents EIA/TIA Section SpecificationsInside Views Main Unit TOP ViewBottom View Removing the Main Unit Disassembly and Option InstructionsDisassembly Instruction Removing the Chassis PanelOptional Unit Installations Receiver Circuits Circuit DescriptionTransmitter Circuits PLL Circuit Power Supply Circuits Voltage LineOutput Expander IC IC10 Port AllocationsPreparation Adjustment Procedures¥ JIG cable Top view PLL Adjustment TXF Software AdjustmentSoftware Adjustment Main Unit Parts ListVariable Thermistor NTCCM20124AG473J-T Tantalum ECST0JY106R Chassis Unit Mechanical Parts and Disassembly AccessoriesChassis Parts IC-F3GS parts SEMI-CONDUCTOR Information Transistor and FET’SDiodes General and EIA/TIA Versions Except W/N-TYPE Board LayoutsMain Unit Bottom View MP6ETS/CEPT Version IC1MP5 VHF FI1 Convenient Parts ListDisassembly Information BC-137 Optional Desktop Charger InformasionBoard Layout Voltage DiagramOption Unit Block DiagramBU4066BCFV Voltage DiagramBand of ETS/CEPT version N-type DTA144EU Avref Vtref Toned Tonem Avcc Section Voltage DiagramPage 32, Kamiminami, Hirano-ku, Osaka, 547-0003, Japan UHF FM Transceivers IC-F4GTIC-F4GS Preparation PLL Adjustment Software Adjustment Power supply requirement APC IC3A NJM3403AV Disassembly and Option Instructions Optional Unit Installations 2ND if and Demodulator Circuits RF signal From PLL Driver Resistor R132 PLL Circuit Power Supply Circuits Voltage LinePTT Adjustment Procedures Screen Display Example DC Power Cable Connections L405 L11 Powerlo BPF T1 NJM3403AV-TE1 IC4 Resistor ERJ2GE Thermistor NTCCM1608 4LH 223KC Ceramic ECUE1H470JCQ ECEV1CA470SP Other Ceramic ECJ0EB1E471K Band MHz band MHz and H-band IC-F4GS parts DTA144 EU DTC144 EE DTC144 EU DTC144 TU DS1 LOW BandFI1 440-470 MHz Band Except W/N-TYPE Icom 470-500 MHz and High Bands B5542B C308 Q19 B5688B BC-137 Optional Desktop Charger Informasion Voltage Diagram Type Type of GEN Type of GEN and EIA/TIA version NJM3403AV M1-band of GEN and EIA/TIA version G W-type of GEN Type 2SC3585 R44 Q403 2SC5107 O Band of ETS/CEPT version N-type M1 440-470 MHz-band Page 13713IZ-C1U
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