
CPU (LSI106: HD6433298A42F)
The 
| Pin No. | Terminal | In/Out | Function | ||||
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| 1 | P50/TXD | 
 | Out | MIDI signal output | |||
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| 2 | P51/RXD | 
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 | In | MIDI signal input | ||
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| 3 | P52/SCK | 
 | Out | Reset signal output | |||
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| 4 | 
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 | In | Reset signal input | |||
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| 5 | 
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 | In | Power ON trigger signal input | |||
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| 6 | VCC | 
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 | In | +5V source | ||
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| 7 | 
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 | In | Standby signal input. Connected to +5V. | |||
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| 8 | VSS | 
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 | In | Ground (0V) source | ||
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| 9, 10 | XTAL, EXTAL | 
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 | In | 20MHz clock input | ||
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| 11, 12 | MD1, MD0 | 
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 | In | Mode selection input | ||
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| 13 | AVSS | 
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 | In | Ground (0V) source | ||
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| 14 | P70 | 
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 | In | Analog input terminal for the pitch bend wheel | ||
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| 15 | P71 | 
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 | In | APO cancellation signal input | ||
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| 16 | P72 | 
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 | Not used. Connected to +5 V source. | 
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| 17 ~ 21 | P73 ~ P77 | 
 | Out | LED drive signal output | |||
| 22 | AVCC | 
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 | In | +5V source | ||
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| 23 ~ 30 | P60 ~ P67 | 
 | Out | LED drive signal output | |||
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| 31 | VCC | 
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 | In | +5V source | ||
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| 32 | P27 | 
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 | Not used | 
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| 33 ~ 48 | A0 ~ A14 | 
 | Out | Address bus | |||
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| 40 | VSS | 
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 | In | Ground (0V) source | ||
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| 49 ~ 56 | D0 ~ D7 | In/Out | Data bus | ||||
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| 57 | P40 | 
 | Out | Clock for KO signal generator | |||
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| 58 | P41 | 
 | Out | KO signal data | |||
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| 59 | P42 | 
 | Out | APO signal output | |||
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| 60 | P43 | 
 | Out | Read enable signal output | |||
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| 61 | P44 | 
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 | In | Write enable signal output | ||
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| 62 | P45 | 
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 | Not used | 
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| 63 | P46 | 
 | Out | 10 MHz clock output | |||
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| 64 | P47 | 
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 | Not used. Connected to +5 V source. | 
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DIGITAL SIGNAL PROCESSOR (LSI102: HG51B155FD)
Upon receipt of note numbers and their velocities, the DSP reads sound and velocity data from the sound source ROM in accordance with the selected tone; the DSP can read rhythm data simultaneously when a rythm pattern is selected. Then it provides 
The following table shows the pin functions of LSI102.
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