Fujitsu MB15E07SL manual Programmable Counter, 16383, 2047, 127

Page 9

MB15E07SL

 

 

Programmable Counter

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LSB

 

 

 

 

 

 

 

Data Flow

 

 

 

 

 

 

 

 

 

 

MSB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

2

3

4

5

6

7

8

9

10

 

11

12

13

14

 

15

16

17

18

19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C

A

A

A

A

A

A

A

N

N

N

N

N

N

N

N

N

N

N

 

N

1

2

3

4

5

6

7

1

2

 

3

4

5

6

 

7

8

9

10

11

 

T

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CNT

: Control bit

 

 

 

 

 

 

 

 

 

 

 

 

 

[Table 1]

 

 

 

 

 

N1 to N11 : Divide ratio setting bits for the programmable counter (3 to 2,047)

 

[Table 3]

 

 

 

 

 

A1 to A7 : Divide ratio setting bits for the swallow counter (0 to 127)

 

 

 

[Table 4]

 

 

 

 

Note: Data input with MSB first.

Table 2. Binary 14-bit Programmable Reference Counter Data Setting

Divide ratio (R)

R14

R13

R12

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

0

0

0

0

0

0

0

0

0

0

0

0

1

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

0

0

0

0

0

0

0

0

0

0

0

1

0

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

16383

1

1

1

1

1

1

1

1

1

1

1

1

1

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note : Divide ratio less than 3 is prohibited.

Table 3. Binary 11-bit Programmable Counter Data Setting

Divide ratio (N)

N11

N10

N9

N8

N7

N6

N5

N4

N3

N2

N1

 

 

 

 

 

 

 

 

 

 

 

 

3

0

0

0

0

0

0

0

0

0

1

1

 

 

 

 

 

 

 

 

 

 

 

 

4

0

0

0

0

0

0

0

0

1

0

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2047

1

1

1

1

1

1

1

1

1

1

1

 

 

 

 

 

 

 

 

 

 

 

 

Note : Divide ratio less than 3 is prohibited.

Table 4. Binary 7-bit Swallow Counter Data Setting

Divide ratio (A)

A7

A6

A5

A4

A3

A2

A1

 

 

 

 

 

 

 

 

0

0

0

0

0

0

0

0

 

 

 

 

 

 

 

 

1

0

0

0

0

0

0

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

127

1

1

1

1

1

1

1

 

 

 

 

 

 

 

 

9

Image 9
Contents Description FeaturesPackages Pin plastic Ssop Pad plastic BCC FPT-16P-M05 LCC-16P-M06PIN Assignments Pin Ssop Pad BCCFPT-16P-M05LCC-16P-M06 PIN Descriptions Pin no DescriptionsName SW FC LDS Block DiagramParameter Symbol Value Unit Remark Min Parameter Symbol Condition Rating Unit Remark MinAbsolute Maximum Ratings Recommended Operating ConditionsParameter Symbol Condition Value Unit Min Typ Electrical CharacteristicsVp/2 Vp − 0.5 V Vp Charge Pump Output Voltage Functional Description Shift Register Configuration Programmable Reference CounterPulse Swallow Function Serial Data InputProgrammable Counter Binary 7-bit Swallow Counter Data Setting Divide ratio a16383 2047LD/fOUT output signal ZC Pin Setting ZC pin Do output Normal output Power Saving Mode Intermittent Mode Control CircuitPS Pin Setting PS pin Status Do Output ControlOFF Parameter Min Typ Max Unit Serial Data Input TimingPhase Comparator Output Waveform Measurment Circuit for Measuring Input Sensitivity fin/OSCIN Fin input sensitivity Typical CharacteristicsOscin input sensitivity Do output current MA modeOscin input impedance Fin input impedancePLL Phase Noise Reference InformationPLL Reference Leakage 500.0 ∝s/div Application Example Ordering Information Usage PrecautionsPart number Package Remarks 16-pin, Plastic Ssop FPT-16P-M05Package Dimensions Fujitsu Limited F16013S-c-4-6 Dimensions in mm inchesPin plastic Ssop FPT-16P-M05 Index Area Pad plastic BCC LCC-16P-M06F0306 Fujitsu Limited