Xilinx UG4153 Running the Verification Tests, Verification Process Level, Verifying the System

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Chapter 5: Verifying the System

R

Running the Verification Tests

There are five tests that can be run by the user. Each test has varying characteristics, including varying video formats, parameter settings, etc. A description of the tests is given in the Appendix, “Supporting Information” and is also summarized in the batch scripts listed under item 3 (Verification scripts) above.

Verification is automated down to running the simple editable Level1 batch script. It contains the command line:

perl -I"..\..\TestBenchSupport" MotionEstimation_Verification.pl [TestLevel][No. Frames][Test#]

TestLevel: 1 (only 1 is available)

No. Frames: between 1 and 10 inclusive

Test#: between 0 and 5 inclusive (0 runs all tests in order from 1 to 5)

Edit the file as desired. Double clicking on the batch file invokes the appropriate test to be executed. Level 1 simulation is summarized in Table 5-1.

Table 5-1:Verifcation Level Summary

Verification

Reference Executable

HW

Notes

Level

Representation

 

 

 

 

 

 

Level 1

ArchC_rev3\bin\len

MTI Simulation

Reference – uses structurally modified reference code

 

cod.exe

(precompiled

to generate stimulus and expected Motion Estimation

 

 

libraries)

Engine outputs for verification at Motion Estimation

 

 

 

level.

 

 

 

Unit under test – uses same precompiled object code

 

 

 

libraries as simulation. Uses stimulus files generated

 

 

 

above as simulation input stimulus.

 

 

 

Detailed – used for debugging.

 

 

 

RTL simulation, thus, only a couple of frames per

 

 

 

hour, depending on the frame size.

 

 

 

 

Verification Process (Level 1)

Table 5-1shows the verification process (Level 1).

START

.yuv Video Source file

.cfg encoder

config file

Modified JM10.2

Reference Software \ArchC_Rev3\bin\lencod.exe

HW Stimulus files:

MotionEstimation...in.txt

ModelSim/Testbench

Expected Output files:

Sitmuli/MotionEstimation...out.txt

END

Compare

ModelSim Output file:

MotionEstimation...out.txt

UG453_03_091107

Figure 5-1:Verification Process (Level 1)

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H.264 Motion Estimation Engine

 

 

UG453 (v1.1) April 23, 2008

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Contents Motion Estimation Engine UG453 v1.1 April 23, 2008 optionalRevision History Date Version Revision10/24/07 Initial Xilinx release 04/23/08 Table of Contents Appendix Supporting Information Schedule of Figures 1H.264 EncoderUG453 v1.1 April 23 Schedule of Tables Table A-1Regression Test SummaryMotion Estimation Engine Guide Contents About This GuideAdditional Resources ConventionsPreface About This Guide Meaning or Use ExampleFile → Open Helvetica boldConventions Hyperlink to a website URL For the latest speed filesUG453 v1.1 April 23 Introduction About the CoreRecommended Design Experience Additional Core ResourcesFeedback IntroductionInstalling the H.264 Motion Estimation Engine Core Manual InstallationSystem Requirements WindowsInstalling the H.264 Motion Estimation Engine Core NetlistsDesigning with the H.264 Motion Estimation Engine Core Vhdl Template FilesMotion Estimation in the H.264 Encoder Model Tech Vhdl simulator test bench codeDesigning with the H.264 Motion Estimation Engine Core 2Motion Estimation Engine Block Diagram Motion Estimation in the H.264 EncoderDesigning with the H.264 Motion Estimation Engine Core Simulating the H Motion Estimation Engine Core Test Bench ReleaseTest bench stimulus files ModelSim-specific script filesRunning the Test Bench Simulating the H Motion Estimation Engine CoreTestbench source file Simulation generates these output filesVerifying the System Verification Platform ReleaseRunning the Verification Tests Verification Process LevelVerifying the System Verification Notes Verification Notes…and the expected output reference file Verifying the System Supporting Information Input SequencesDirectory Tree Structure Regression Test DescriptionsReferences Figure A-1Directory Tree Structure