Maxtor 2B010H1, 2B015H1, 2B020H1 manual Device Terminating an Ultra DMA Data Out Burst

Page 34

AT INTERFACE DESCRIPTION

DMARQ (device)

DMACK-

(host)

STOP (host)

DDMARDY-

(device)

HSTROBE

(host)

DD(15:0)

(host)

DA0, DA1, DA2,

CS0-, CS1-

tLI	tMLI	tACK
tRP		tIORDYZ
tRFS
tLI	tMLI	tACK
	tDVS	tDVH
		CRC
		tACK

Figure 5 - 13

Device Terminating an Ultra DMA Data Out Burst

5 – 10

Image 34

Contents Maxtor 541DX Product Manual Before You Begin U T I O NContents Product Specifications Handling and InstallationAT Interface Description Interface CommandsHost Software Interface Service and Support GlossaryFigures ManualOrganization IntroductionMaxtorCorporation AbbreviationsConventions Key Features ProductDescriptionFunctional / Interface Product FeaturesModels CYL SP T MAX LBA Capacity CacheManagement Major HDA Components Jumper Configuration SubsystemConfigurationJumper Location / Configuration Cylinder Limitation Jumper DescriptionPerformanceSpecifications ProductSpecificationsDrive Configuration Models and CapacitiesPhysical Dimensions Param Eter Valu EEPA Energy Star Compliance PowerRequirementsPower Mode Definitions Environmental LimitsShock and Vibration Reliability SpecificationsParam Eter Oper AT ING ON- Oper AT ING Safety Regulatory Compliance EMC/EMIHard Drive Handling Precautions HandlingandInstallationElectro-Static Discharge ESD Unpacking and Inspection Multi-pack Shipping ContainerPhysical Installation RepackingBefore You Begin Hook upSet up Start upPinDescriptionSummary InterfaceConnectorATInterfaceDescription PIN IGN ALPIN Name Signal Name Signal Desc Ription Pin Description TableIM in G Paramet ERS Mode PIO TimingImin G Paramet ERS Mode DMATimingUltra DMA Timing ModeSustained Ultra DMA Data In Burst Device Terminating an Ultra DMA Data In Burst Initiating an Ultra DMA Data Out Burst Device Pausing an Ultra DMA Data Out Burst Device Terminating an Ultra DMA Data Out Burst Task File Registers HostSoftwareInterfacePOR T EAD WR ITE Conten TS LBA Bits CommandRegister Seek, Format, and Diagnostic CommandsSummary M M a N D N a M E M M a N D code PA R a M E T E R S U S E DControl Diagnostic Registers Reset and Interrupt Handling InterfaceCommands ReadCommands Read DMA WriteCommands Write Multiple VAL UE DES C RIP Tion ModeSet/CheckCommandsEC TOR LE VE L VAL UE Omman D PowerModeCommands Timer VAL UE TIME-OUT PeriodSleep Mode InitializationCommands Or D ENT Desc RiptionOr D 15- 10, as c urrently defined Initialize Drive Parameters Seek,FormatandDiagnosticCommands ER ROR Code Desc RiptionA.R.T. CommandSet Key RegisterNo Quibble Service ServiceandSupportService Policy Product SupportFrom Dial Glossary Channel Correctable errorCentral processing unit CPU CharacterError correction code ECC Direct accessDirect memory access DMA Error freeFrequency response Hard errorHead disk assembly HDA Gigabyte GBLogic Late windowLatency Logical addressRandom access memory RAM Phase locked loop PLLPhase margin Read gate signalSequential access Sector pulse signalSeek complete signal Soft errorUnrecoverable error Strobe offset signalUn-correctable error Write gate signal