Circuit Description
ode D1048 (HSC277TRF) to the buffer amplifier Q1024 (2SC5005), pre driver amplifier Q1020 (2SC3357), driver amplifier Q1014 (RD01MUS1), and then the am- plified transmit signal is applied to the final amplifier Q1008 (RD07MVS1), which delivers up to 5 watts of output power.
The transmit signal then passes through the antenna switch D1004 (RLS135) and is
Automatic Transmit Power Control
Current from the final amplifier is sampled by R1015, R1038 and R1040, and is rectified by Q1003 (IMZ2A). The resulting DC is fed back through Q1002 (UMX1) to the drive amplifier Q1014 and final amplifier Q1008, for control of the power output.
The microprocessor selects “High” or “Low” power levels.
Transmit Inhibit
When the transmit PLL is unlocked, pin 7 of PLL IC Q1005 (MB15A01PFV) goes to a logic “Low.” The re- sulting DC unlock control voltage is passed to pin 10 of the microprocessor Q1047. While the transmit PLL is un- locked, pin 31 of Q1047 remains high, which then turns off Q1012 (CPH6102) and the Automatic Power Con- troller Q1002 (UMX1) to disable the supply voltage to the
Spurious Suppression
Generation of spurious products by the transmitter is minimized by the fundamental carrier frequency being equal to final transmitting frequency, modulated directly in the transmit VCO. Additional harmonic suppression is provided by a
PLL Frequency Synthesizer
The PLL circuitry on the Main Unit consists of VCO Q1030, Q1033 (both
(2SC5005 ), and PLL subsystem IC Q1051 (MB15A01PFV1), which contains a reference divider,
While receiving, VCO Q1030 oscillates between 399.15 and 439.15 MHz according to the transceiver ver- sion and the programmed receiving frequency. The VCO output is buffered by Q1026, then applied to the prescaler
section of Q1051. There the VCO signal is divided by 64 or 65, according to a control signal from the data latch section of Q1051, before being sent to the programmable divider section of Q1051.
The data latch section of Q1051 also receives serial dividing data from the microprocessor Q1047, which causes the
6.25kHz derivative of the current VCO frequency. Meanwhile, the reference divider section of Q1051 di-
vides the 16.80 MHz crystal reference from the reference oscillator Q1051, by 3360 (or 2688) to produce the 5.0 kHz (or 6.25 kHz) loop references (respectively).
The 5.0 kHz (or 6.25 kHz) signal from the program- mable divider (derived from the VCO) and that derived from the reference oscillator are applied to the phase de- tector section of Q1051, which produces a pulsed output with pulse duration depending on the phase difference be- tween the input signals.
This pulse train is filtered to DC and returned to varactors D1021, D1022, D1023, and D1024 (all HVC355B). Changes in the level of the DC voltage are applied to the varactors, affecting the reference in the tank circuit of the VCO according to the phase difference be- tween the signals derived from the VCO and the crystal reference oscillator.
The VCO is thus
For transmission, the VCO Q1033 (2SK508) oscil- lates between 450.00 and 490.00 MHz according to the model version and programmed transmit frequency. The remainder of the PLL circuitry is shared with the receiver. However, the dividing data from the microprocessor is such that the VCO frequency is at the actual transmit frequency (rather than offset for IFs, as in the receiving case). Also, the VCO is modulated by the speech audio applied to D1017 (HVC350B), as described previously.
Receive and transmit buses select which VCO is made active, using Q1028, Q1031, Q1032 (all RT1N441U).
Miscellaneous Circuits
Push-To-Talk Transmit Activation
The PTT switch on the microphone is connected to pin
22 of microprocessor Q1047, so that when the PTT switch is closed, pin 27 of Q1047 goes low. This signal disables the receiver by disabling the 5V supply bus at Q1022 (DTB123EK) to the
At the same time, Q1013 (UMX1N) and Q1012 (CPH6102) activate the transmit 5V supply line to en- able the transmitter.
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