Using HDLC.FRAME Protocol
Link State Indications
Link State Indications
Non-E1/T1 ACC
If the “DSIG” configuration bit is set then the UP/DOWN state of the HDLC.FRAME terminal is dependent on the state of the CTS and DCD signals. When CTS and DCD are both asserted, the HDLC.FRAME terminal is UP.
If the “DSIG” configuration bit is clear then the state of the HDLC.FRAME terminal is not dependent on the state of the CTS and DCD signals. In this case the HDLC.FRAME terminal is always UP.
E1/T1 ACC
The E1/T1 ACC determines the UP/DOWN state of each port by the state of the frame synchronization mechanism. When the hardware establishes E1 or T1 frame synchronization on a port then all HDLC.FRAME terminals on that port are immediately placed in the UP state. If the hardware cannot detect received E1 or T1 frames without error, then all HDLC.FRAME terminals on that port are placed in the DOWN state. The sensitivity of the ACC to errors on the E1 or T1 lines is affected by the “qdown” port option.
The “qdown” port configuration option is documented in the ACC Utilities Guide chapter on TTGEN. It affects the way an E1 or T1 port is set DOWN when frame synchronization is lost.
•Without the “qdown” option, the frame synchronization of an E1 or T1 port is checked every second. If frame synchronization is lost at 4 consecutive checkpoints, then the port is set DOWN. This ensures that higher level protocols are not disturbed by transient errors on the line. This is the recommended configuration.
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