Protocol Specific Configuration
Non-E1/T1 HDLC.FRAME Configuration
Values
Poll Word
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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Reserved (0) | AZR | AZT | 0 | CWEN | RSIG | DSIG | RTS | Reserved (0) |
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All reserved bit positions must be filled with zeros (0). |
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AZR - (Z7340A only) Analyzer terminal for received data
Enables this terminal for monitoring frames received on the port. All received frames are copied, and the copy delivered to the receiving application for this terminal. This terminal cannot be used to transmit frames.
AZT - (Z7340A only) Analyzer terminal for transmitted data
Enables this terminal for monitoring frames transmitted on the port. All transmitted frames are copied, and the copy delivered to the receiving application for this terminal. This terminal cannot be used to transmit frames.
CWEN - Enable the use of formatted Control Write requests
If set to one (1), this bit enables the use of formatted control write requests. See the “Request Specific Processing” section of Chapter 3 , “Using HDLC.FRAME Protocol,” for the format to be used.
RSIG - Report status on CTS or DCD signal state change
If set to one (1), this bit enables an unsolicited status message to be delivered to the receiving application when either of the CTS or DCD signals is dropped, and when both CTS and DCD are raised.
If this bit is set to zero (0), the HDLC.FRAME terminal does not report the state of the CTS and DCD signals.
38 | Chapter 4 |