Specifications for telecom testing using the
HP 37722A telecom analyzer or the
HP 37732A telecom/datacom analyzer
Telecom specifications | Transmitter | Receiver |
Bit rates: 2.048 Mb/s, 64 kb/s; optional 8.448 Mb/s, 704 kb/s, sub- 64 kb/s.
Frame structure: 2 Mb/s unframed, to
64 kb/s codirectional; independent setting for transmitter and receiver.
Interfaces: To
Connectors
BNC: 75 ohm, unbalanced.
3-pin Siemens: 120 ohm,
balanced.
Modes of operation
Transmit, receive, through mode.
Auto setup
Bit rate, line code, framing and pattern.
Test patterns
PRBS: 211 − 1
Word: Fully programmable
Timeslot selection: All timeslots, single timeslot, n timeslots for n = 1 to 31 (contiguous or
Test period: Manual, single:
15 min, 30 min, 1 hour, 24 hour, user defined:
1 to 100 seconds, minutes, hours, days.
Timing: Recovered (loop timed), internal, external.
Internal clock: 2.048 MHz, 64 kHz, (± 10 ppm).
2 Mb/s transmitter
Output
Ternary: HDB3 or AMI.
Binary: TTL, data NRZ, clock normal or inverted, .
Error insertion
Bit, code: Single, variable 10− 2 to 10− 8.
Frame error add
FAS word, NFAS bit, CAS MFAS word (CAS multiframe mode); CRC MFAS word and CRC bits (CRC4 multiframe mode). Mode: Burst, continuous.
Alarm generation: AIS 2 or 3 zeros in 512; AIS all ones, remote alarm, remote mutiframe alarm, no signal.
Signaling bits: Set ABCD signaling bits in CAS multiframe to any
Overhead bits: Individual setting of Si, spare MFAS, NFAS bits 4 to
8(Sa) for all
64 kb/s transmitter
Codirectional data output Octet timing (to
On, off.
Bit error add: Single, variable 10− 2 to 10− 8.
2 Mb/s receiver
Timeslot monitor: Displays contents of single data timeslot, FAS timeslot, NFAS timeslot (bits 1 to 8 for all
Input
Binary/ternary: 2.048 Mb/s
±100 ppm (nominal). Terminate: 0 to 30 dB. Binary: TTL, data NRZ, clock normal or inverted.
64 kb/s receiver
Codirectional data input: 64 kb/s ± 150 ppm (nominal). Terminate: 0 to 30 dB.
HP 37722A telecom analyzer
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