I/O pins and supported ATA signals, Drive pin #

HP 6573Z (US), 6671 (LA), 6642D (US) I/O pins and supported ATA signals, Drive pin #, Signal name

Page 29

22				U8 Family Product Manual, Rev. B
Drive pin #	Signal name						Host pin # and signal description
1			Reset–					1			Hardware Reset
1			Reset–					1			Hardware Reset
2			Ground	2							Ground
3			DD7		3						Host Data Bus Bit 7
3			DD7		3						Host Data Bus Bit 7
4			DD8		4						Host Data Bus Bit 8
4			DD8		4						Host Data Bus Bit 8
5			DD6		5						Host Data Bus Bit 6
5			DD6		5						Host Data Bus Bit 6
6			DD9		6						Host Data Bus Bit 9
6			DD9		6						Host Data Bus Bit 9
7			DD5		7						Host Data Bus Bit 5
7			DD5		7						Host Data Bus Bit 5
8			DD10		8						Host Data Bus Bit 10
8			DD10		8						Host Data Bus Bit 10
9			DD4		9						Host Data Bus Bit 4
9			DD4		9						Host Data Bus Bit 4
10			DD11		10						Host Data Bus Bit 11
10			DD11		10						Host Data Bus Bit 11
11			DD3		11						Host Data Bus Bit 3
11			DD3		11						Host Data Bus Bit 3
12			DD12		12						Host Data Bus Bit 12
12			DD12		12						Host Data Bus Bit 12
13			DD2		13						Host Data Bus Bit 2
13			DD2		13						Host Data Bus Bit 2
14			DD13		14						Host Data Bus Bit 13
14			DD13		14						Host Data Bus Bit 13
15			DD1		15						Host Data Bus Bit 1
15			DD1		15						Host Data Bus Bit 1
16			DD14		16						Host Data Bus Bit 14
16			DD14		16						Host Data Bus Bit 14
17			DD0		17						Host Data Bus Bit 0
17			DD0		17						Host Data Bus Bit 0
18			DD15		18						Device Data (15:0)
18			DD15		18						Device Data (15:0)
19			Ground	19							Ground
20			(removed)	20							(No Pin)
21			DMARQ						21		DMA Request
21			DMARQ						21		DMA Request
22			Ground	22							Ground
23			DIOW–						23		Device I/O Write:
23			DIOW–						23		Device I/O Write:
			STOP								Stop Ultra DMA Burst
			STOP								Stop Ultra DMA Burst
24			Ground	24							Ground
25			DIOR–							25	Device I/O Read:
25			DIOR–							25	Device I/O Read:
		HDMARDY–									Host Ultra DMA Ready:
		HDMARDY–									Host Ultra DMA Ready:
			HSTROBE								Host Ultra DMA Data Strobe
			HSTROBE								Host Ultra DMA Data Strobe
26			Ground	26							Ground
27			IORDY				27				I/O Channel Ready
27			IORDY				27				I/O Channel Ready
		DDMARDY–									Device Ultra DMA Ready
		DDMARDY–									Device Ultra DMA Ready
			DSTROBE								Device Ulta DMA Data Strobe
			DSTROBE								Device Ulta DMA Data Strobe
28			CSEL							28	Cable Select
28			CSEL							28	Cable Select
29			DMACK–							29	DMA Acknowledge
29			DMACK–							29	DMA Acknowledge
30			Ground	30							Ground
31			INTRQ			31					Device Interrupt
31			INTRQ			31					Device Interrupt
32			IOCS16–			32					Reserved
32			IOCS16–			32					Reserved
33			DA1							33	Host Address Bus Bit 1
33			DA1							33	Host Address Bus Bit 1
34			PDIAG–							34	Passed Diagnostics
34			PDIAG–							34	Passed Diagnostics
			CBLID–								Cable Assembly Type Identifier
35			DA0							35	Device Address (2:0)
35			DA0							35	Device Address (2:0)
36			DA2							36	Device Address (2:0)
37			CS0–							37	Chip Select (1:0)
38			CS1–							38	Chip Select (1:0)
39			DASP–			39					Drive Active/Slave Present
40			Ground	40							Ground

Pins 28, 34 and 39 are used for master-slave communication (details shown below).

Drive 1 (slave)

Drive 0 (master)		Host
28	CSEL	28

34	PDIAG–	34

39	DASP–	39

Figure 4. I/O pins and supported ATA signals

Image 29

Contents

ST317221A, ST313021A U8 FamilyST38410A, ST34313A Ultra ATA Interface DrivesST317221A, ST313021A U8 FamilyST38410A, ST34313A Ultra ATA Interface DrivesPage U8 Family Product Manual, Rev. B ContentsATA interface Configuring and mounting the driveFigures U8 Family Product Manual, Rev. B Introduction Drive Specification Specification summary tableST317221A ST313021A0 to 60C op., -40 to 70C nonop ST317221AST317221A 1.1.1 Default logical geometry 1.0 Drive specifications1.1 Formatted capacity 1.2 Physical organizationDrive Specification 1.4 Physical characteristics1.3 Recording and interface technology 1.5 Seek time1.7.1 Power consumption 1.7 Power specificationsSpinup power 1.6 Start/stop timesOperating power and current Read/Write power and currentIdle mode power Seek Mode1.7.1.1 Typical current profile Power ModeTypical Watts Typical Amps RMSPower Modes 1.7.4 Power-management modes1.7.2 Conducted noise 1.7.3 Voltage tolerance1.8 Environmental tolerances 1.8.1 Ambient temperature Idle and Standby timers1.8.2 Temperature gradient Sleep mode1.8.3 Humidity 1.9 Drive acoustics 1.8.6.1 Operating vibration1.8.6.2 Nonoperating vibration 1.10 Electromagnetic susceptibility 1.12 Agency certification 1.12.1 Safety certification1.11 Reliability 1.12.2 Electromagnetic compatibilityAustralian CE-Tick N176 1.12.3 FCC verificationU8 Family Product Manual, Rev. B 2.1 Handling and static-discharge precautions 2.0 Configuring and mounting the drive7 5 3 8 6 4 2.2 Jumper settings 2.2.1 Master/slave configurationOptions jumper block J8 Master or single drive Drive is slave Cable select2.3 Drive mounting 2.2.2 Cable-select option2.2.3 Ultra ATA/66 cable Note Dimensions are shown in inches mm Figure 3. Mounting dimensions-top, side and end view3.1 ATA interface signals and connector pins 3.0 ATA interfaceSignal name Figure 4. I/O pins and supported ATA signalsHost pin # and signal description Drive pin #Command name 3.1.1 Supported ATA commandsCommand code in hex ATA-standard commandsCommand code in hex 3.1.2 Identify Drive commandDescription Wordx.xx Valuexx07H xxxxHxx1FH Bit Word xxA5HDescription if bit is set to Bit Word Set transfer mode based on value in Sector Count register 3.1.3 Set Features commandCode in Features 3.1.4 S.M.A.R.T. commandsS.M.A.R.T. Command RegisterCode in Features Page Page Publication Number SG35226-001, Rev. B, Printed in USA Seagate Technology, Inc920 Disc Drive, Scotts Valley, California 95066, USA

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