AD8342
IF PORT
The IF port comprises
The specified performance numbers for the AD8342 were measured with 100 Ω differential terminations. However, dif- ferent load impedances may be used where circumstances dic- tate. In general, lower load impedances result in lower conver- sion gain and lower output P1dB. Higher load impedances result in higher conversion gain for small signals, but lower IP3 values for both input and output.
If the IF signal is to be delivered to a remote load, more than a few millimeters away at high output frequencies, avoid unin- tended parasitic effects due to the intervening PCB traces. One approach is to use an impedance transforming network or transformer located close to the AD8342. If very wideband out- put is desired, a nearby buffer amplifier may be a better choice, especially if IF response to dc is required. An example of such a circuit is presented in Figure 45, in which the AD8351 differen- tial amplifier is used to drive a pair of 75 Ω transmission lines. The gain of the buffer can be independently set by appropriate choice of the value for the gain resistor, RG.
50 |
| 0.5 |
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45 |
| 0.4 |
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40 |
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35 |
| 0.3 | CAPACITANCE(pF) |
30 |
| 0.2 | |
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25 |
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20 |
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RESISTANCE(kΩ) |
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15 |
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10 |
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5 |
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0 | 100M 200M 300M 400M 500M 600M 700M 800M 900M | ||
0 | 1G | ||
| FREQUENCY (Hz) |
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Figure 44. IF Port Impedance
The high input impedance of the AD8351 allows for a shunt differential termination to provide the desired 100 Ω load to the AD8342 IF output port.
It is necessary to bias the
•Chris Bowick, RF Circuit Design, Newnes, Reprint Edition, 1997.
•David M. Pozar, Microwave Engineering, Wiley Text Books, Second Edition, 1997.
•Guillermo Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, Prentice Hall, Second Edition, 1996.
| 90 |
120 | 60 |
150 | 30 |
| 50MHz |
+VS
AD8342 |
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| +V |
COMM | 8 |
| RFC |
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| S |
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IFOP | 7 |
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| Ω |
| RG | AD8351 |
IFOM | 6 |
| 100 |
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COMM | 5 |
| RFC |
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| +V |
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| S | Z | L | = 100Ω |
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Tx LINE ZO = 75Ω
ZL
Tx LINE ZO = 75Ω
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| REAL |
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| CHOKES |
180 |
| 0 |
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| 50MHz |
| 500MHz | IDEAL |
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| CHOKES |
210 |
| 330 |
| 500MHz |
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240 | 300 |
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Figure 45. AD8351 Used as Transmission Line Driver and Impedance Buffer
270 | 05352 |
Figure 46. IF Port Loading Effects Due to Finite Q Pull-Up Inductors
(Murata BLM18HD601SN1D Chokes)
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