Analog Devices AD8342 specifications Outline Dimensions, Ordering Guide

Page 20

AD8342

Preliminary Technical Data

 

 

OUTLINE DIMENSIONS

3.00

BSC SQ

PIN 1

TOP

INDICATOR

VIEW

 

 

 

0.50

 

 

 

 

0.40

 

 

0.60 MAX

 

0.30

PIN 1

 

 

 

 

INDICATOR

0.45

13

16

1

*1.65

1.50 SQ

 

12

 

2.75

 

 

 

1.35

BSC SQ

 

EXPOSED

 

 

 

 

PAD

 

 

0.50

9

(BOTTOM VIEW) 4

 

8

5

BSC

 

 

0.25 MIN

12° MAX

 

0.80 MAX

1.50 REF

 

 

0.90

 

0.65 TYP

 

 

 

 

0.85

 

0.05 MAX

 

0.80

 

 

 

0.02 NOM

 

SEATING

0.30

 

 

 

PLANE

0.20 REF

 

0.23

 

 

 

 

 

0.18

 

 

*COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2

EXCEPT FOR EXPOSED PAD DIMENSION.

Figure 54. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

3 mm x 3 mm Body, Very Thin Quad

(CP-16-3)

Dimensions in millimeters

ORDERING GUIDE

 

Temperature

 

Package

 

Transport Media,

Models

Package

Package Description

Outline

Branding

Quanity

 

 

 

 

 

 

AD8342ACPZ-REEL71

−40°C to +85°C

16-Lead Lead Frame Chip Scale Package

CP-16-3

Q01

1,500, Reel

 

 

[LFCSP_VQ]

 

 

 

AD8342ACPZ-R21

−40°C to +85°C

16-Lead Lead Frame Chip Scale Package

CP-16-3

Q01

250, Reel

 

 

[LFCSP_VQ]

 

 

 

AD8342ACPZ-WP1

−40°C to +85°C

16-Lead Lead Frame Chip Scale Package

CP-16-3

Q01

50, Waffle Pack

 

 

[LFCSP_VQ]

 

 

 

AD8342-EVAL

 

Evaluation Board

 

 

1

 

 

 

 

 

 

1Z = Pb-free part.

© 2005 Analog Devices, Inc. All rights reserved. Trademarks and regis- tered trademarks are the property of their respective owners.

D05352–0–4/05(0)

Rev. 0 Page 20 of 20

Image 20
Contents Features Functional Block DiagramApplications General DescriptionTable of Contents Specifications Parameter Conditions Min Typ Max UnitAC Performance SSB Noise FigureSpur Table Parameter Rating Absolute Maximum RatingsESD Caution Function PIN Configuration and Function DescriptionsPin No Typical Performance Characteristics Conversion Gain vs. RF FrequencyInput IP3 vs. RF Frequency AD8342 AD8342 AD8342 LO to RF Leakage vs. LO Frequency, LO Power = 0 dBm Simplified Schematic Showing the Key Elements of the AD8342 Circuit DescriptionAC Interfaces Input 50 Ω 100 Ω 500 Ω Matched Network ShuntIf Port If Port ImpedanceLO Considerations Voltage Conversion Gain vs. if LoadingHigh if Applications Ac loading impedanceComponent Function Default ConditionsEvaluation Board Outline Dimensions Ordering Guide