The RTL8019 ethernet chip supports either
A dd res s Range | Function | Chip Select |
0x00000000 to 0x000003FF | in terrupt vecto r table |
|
0x00000400 to 0x01FFFFFF | SDRA M (32 M B) | CSD0 (CSD1) |
0x01FFFFFF to 0x0FFFFFFF | unimplemented s pace |
|
0x10000000 to 0x103FFFFF | FLA SH ROM | CSA 0 |
0x11000000 to 0x107FFFFF | Realtek Ethern et/CA N/USB | CSA 1 |
| Controller |
|
0x10800000 to 0x1FFFFFFF | unimplemented s pace |
|
0x20000000 to 0x2001FFFF | PCI | CSB0 |
0x30000000 to 0x400000000 | PCI I/O mapped peripherals |
|
0x400000000 to amo unt needed | PCI memory map ped p erip herals |
|
en d of PCI periph erals to 0xFFFFEFFF | unimplemented s pace |
|
Figure 3. Memory Map
I/O Memory
The mapping of the I/O Memory into the CPU’s main memory takes place at 2 different locations.
At 0xFFFFF000 the DragonBall VZ registers and boot microcode fill the available memory to the end of the CPU memory. For more detailed information on the DragonBall VZ Registers and the DragonBall VZ Boot Microcode consult the DragonBall VZ Users’ Manual (located on the CD).
The Ethernet controller on the NETdimm is mapped off the DragonBall VZ’s CSA1 chip select, and is located at 0x10400000. Programming information for the Realtek RTL8019AS Ethernet Controller is not included in this document and may be found in the RTL8019AS Datasheet (located on the CD).
FLASH ROM
The Flash ROM used on the dimmPCITM is the AMD29DL322D or compatible 3.0V FLASH ROM. The exact Flash part or size is dependant on the current FLASH in stock or available on the market. The Flash is located at 0x10000000 in memory.
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