Acer 4253G manual Post Codes, Post Code Range Phase

Post Codes

The following are the InsydeH2O™ Functionality POST code tables. The components of the POST code table includes: SEC phase, PEI phase, DXE phase, BDS phase, CSM functions, S3 functions and ACPI functions.

Table 4-2. POST Code Range

Phase		POST Code Range
SEC	0x01	- 0x0F
PEI	0x70	- 0x9F
DXE	0x40	- 0x6F
BDS	0x10	- 0x3F
SMM	0xA0 - 0xBF
S3	0xC0 - 0xCF
ASL	0x51	– 0x55
	0xE1 – 0xE4
PostBDS	0xF9 – 0xFE
InsydeH2ODDT™ Reserve	0xD0 – 0xD7
OEM Reserve	0xE8 – 0xEB
Reserved	0xD8 – 0xE0
	0xE5 – 0xE7
	0xEC – 0xF8

Table 4-3. SEC Phase POST Code Table

Functionality Name (Include\	Phase	PostCode	Description
PostCode.h)
SEC_SYSTEM_POWER_ON	SEC	01	CPU power on and switch to
			Protected mode
SEC_BEFORE_MICROCODE_PATCH	SEC	02	Patching CPU microcode
SEC_AFTER_MICROCODE_PATCH	SEC	03	Setup Cache as RAM
SEC_ACCESS_CSR*	SEC	04	PCIE MMIO Base Address initial
SEC_GENERIC_MSRINIT*	SEC	05	CPU Generic MSR initialization
SEC_CPU_SPEEDCFG*	SEC	06	Setup CPU speed
SEC_SETUP_CAR_OK	SEC	07	Cache as RAM test
SEC_FORCE_MAX_RATIO*	SEC	08	Tune CPU frequency ratio to
			maximum level

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