Appendix A - Pin AssignmentsLTPH-UM-1088-02, Issue 2
Table 2. T1/E1 Transmit Pin Assignments
Pin Number | Description | Pin Number | Description |
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1 | DSX_TX_RING1 | 33 | DSX_TX_TIP1 |
2 | DSX_TX_RING2 | 34 | DSX_TX_TIP2 |
3 | DSX_TX_RING3 | 35 | DSX_TX_TIP3 |
4 | DSX_TX_RING4 | 36 | DSX_TX_TIP4 |
5 | DSX_TX_RING5 | 37 | DSX_TX_TIP5 |
6 | DSX_TX_RING6 | 38 | DSX_TX_TIP6 |
7 | DSX_TX_RING7 | 39 | DSX_TX_TIP7 |
8 | DSX_TX_RING8 | 40 | DSX_TX_TIP8 |
9 | DSX_TX_RING9 | 41 | DSX_TX_TIP9 |
10 | DSX_TX_RING10 | 42 | DSX_TX_TIP10 |
11 | DSX_TX_RING11 | 43 | DSX_TX_TIP11 |
12 | DSX_TX_RING12 | 44 | DSX_TX_TIP12 |
13 | DSX_TX_RING13 | 45 | DSX_TX_TIP13 |
14 | DSX_TX_RING14 | 46 | DSX_TX_TIP14 |
15 | DSX_TX_RING15 | 47 | DSX_TX_TIP15 |
16 | DSX_TX_RING16 | 48 | DSX_TX_TIP16 |
17 | DSX_TX_RING17 | 49 | DSX_TX_TIP17 |
18 | DSX_TX_RING18 | 50 | DSX_TX_TIP18 |
19 | DSX_TX_RING19 | 50 | DSX_TX_TIP19 |
20 | DSX_TX_RING20 | 52 | DSX_TX_TIP20 |
21 | DSX_TX_RING21 | 53 | DSX_TX_TIP21 |
22 | DSX_TX_RING22 | 54 | DSX_TX_TIP22 |
23 | DSX_TX_RING23 | 55 | DSX_TX_TIP23 |
24 | DSX_TX_RING24 | 56 | DSX_TX_TIP24 |
25 | DSX_TX_RING25 | 57 | DSX_TX_TIP25 |
26 | DSX_TX_RING26 | 58 | DSX_TX_TIP26 |
27 | DSX_TX_RING27 | 59 | DSX_TX_TIP27 |
28 | DSX_TX_RING28 | 60 | DSX_TX_TIP28 |
29 | N/C | 61 | N/C |
30 | N/C | 62 | N/C |
31 | N/C | 63 | N/C |
32 | N/C | 64 | Chassis Ground |
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16 | January 3, 2002 | ThinMux Chassis |