Agilent Technologies FS2100, FS2101

Analysis Probe

Cable Header and

Pin number

Logic Analyzer

channel number PCI Signal name

Header 9 pin 3 CLK/16

5 no connect

7 15 AD47

9 14 AD46

11 13 AD45

13 12 AD44

15 11 AD43

17 10 AD42

19 9 AD41

21 8 AD40

23 7 AD39

25 6 AD38

27 5 AD37

29 4 AD36

31 3 AD35

33 2 AD34

35 1 AD33

37 0 AD32

Contents

Main HOW TO REACH US 5 PRODUCT WARRANTY 6 INTRODUCTION 7 ANALYZING THE PCI LOCAL BUS 8 STATE ANALYSIS 23 TIMING ANALYSIS 33 GENERAL INFORMATION 36 How to reach us Product Warranty Limitation of warranty Exclusive Remedies Assistance Introduction How to Use This Manual Analyzing the PCI Local Bus Duplicating the Master Diskette Accessories Supplied Minimum Equipment Required Signal Naming Conventions Viewing the interrupts Configuring the front panel switches and LEDs Powering the PCI Active Analysis Probe Connecting to the PCI Active Analysis Probe Multiplexed versus Demultiplexed 32 bit PCI Demultiplexed 32 bit PCI Multiplexed 64 bit PCI Multiplexed 64 bit PCI Demultiplexed USER PINS Installing the PCI Active Analysis Probe How to install a PCI add-in card into the extender card connector Operation of the PCI add-in card The Extender Card Connector Setting up the Analyzer from the diskette The PCI Inverse Assembler The Format Menu The STAT variable The ADDR, ADDR_B , ADDR_C, DATA_B and DATA variables The BUS_UT variable The L_CMD variable Theory of Operation The Input Buffers The Latching Buffers The interface to the Logic Analyzer The Clocking and Cycle bit Generation Logic The Data Parity Checking Logic State Analysis Installation Quick Reference Using the front panel switches in state mode Acquiring Data The The following error messages are reported by the PCI inverse assembler. Error Messages ERROR-NO DEVICE SELECTED ERROR DEVSEL ASSERTED SYSTEM ERROR INVASM OPTIONS The State Display with the PCI PC Mapper Error Messages The error messages reported by the PCI PC Mapper are the PCI PC Mapping for memory transactions Interrupt Vector Table Page PCI PC Mapping - I/O Transactions Page Page Timing Analysis Installation Quick Reference Timing Mode Skew Page Page General Information Characteristics Page Signal Connections