Chapter 3

 

 

Hardware

 

 

 

 

 

 

 

J4

Signal

40-

Description

 

 

Pin #

 

Pin #

 

 

 

 

GND

22

Ground

 

 

54

PIDE_IOW*

23

Drive I/O Write – Strobe signal for write functions. Negative edge

 

 

 

 

 

enables data from a register or data port of the drive onto the host

 

 

 

 

 

data bus. Positive edge latches data at the host.

 

 

 

GND

24

Ground

 

 

52

PIDE_IOR*

25

Drive I/O Read – Strobe signal for read functions. Negative edge

 

 

 

 

 

enables data from a register or data port of the drive onto the host

 

 

 

 

 

data bus. Positive edge latches data at the host.

 

 

 

GND

26

Ground

 

 

48

PIDE_RDY

27

I/O Channel Ready – When negated extends the host transfer cycle

 

 

 

 

 

of any host register access when the drive is not ready to respond to

 

 

 

 

 

a data transfer request. High impedance if asserted.

 

 

90

CBLID_P*

28

Cable ID Select – Used to detects the presence of an 80 conductor

 

 

 

 

 

IDE cable on the primary IDE channel. This allows BIOS or

 

 

 

 

 

system software to determine if is necessary to enable high-speed

 

 

 

 

 

transfer modes (DMA66 or DMA100).

 

 

46

PIDE_AK*

29

DMA Channel Acknowledge – Used by the host to acknowledge

 

 

 

 

 

data has been accepted or data is available. Used in response to

 

 

 

 

 

DMARQ asserted.

 

 

 

GND

30

Ground

 

 

44

PIDE_INTRQ

31

Drive Interrupt Request (IRQ 14)– Asserted by drive when it has

 

 

 

 

 

pending interrupt (PIO transfer of data to or from the drive to the

 

 

 

 

 

host).

 

 

NC

NC

32

Not Connected

 

 

 

 

 

 

 

 

40

PIDE_A1

33

Drive Address Bus 1 – Used (0 to 2) to indicate which byte in the

 

 

 

 

 

ATA command block or control block (register) is being accessed.

 

 

NC

PDIAG*

34

Not Connected (Passed Diagnostics)

 

 

 

 

 

 

 

 

38

PIDE_A0

35

Drive Address Bus 0 – Used (0 to 2) to indicate which byte in the

 

 

 

 

 

ATA command block or control block (register) is being accessed.

 

 

36

PIDE_A2

36

Drive Address Bus 2 – Used (0 to 2) to indicate which byte in the

 

 

 

 

 

ATA command block or control block (register) is being accessed.

 

 

32

PIDE_CS1*

37

Chip Select 1 – Used to select the host-accessible Command Block

 

 

 

 

 

Register.

 

 

30

PIDE_CS3*

38

Chip Select 3 – Used to select the host-accessible Command Block

 

 

 

 

 

Register.

 

 

NC

DASP*

39

Not Connected (Drive Active/Drive Present)

 

 

 

 

 

 

 

 

 

GND

40

Ground

 

 

 

 

 

 

 

Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.

XTX 820

Reference Manual

47

Page 53
Image 53
Ampro Corporation XTX 820 Pideiow, Pideior, Piderdy, Cblidp, Pideak, Pideintrq, PIDEA1, Pdiag, PIDEA0, PIDEA2, PIDECS1

XTX 820 specifications

Ampro Corporation has made a significant mark in the world of embedded systems with its versatile XTX 820 embedded computing module. The XTX 820 is designed to cater to a wide array of applications, ranging from industrial automation to medical devices, providing developers with a powerful yet compact solution.

One of the standout features of the XTX 820 is its advanced processing capabilities. The module is equipped with an Intel Atom processor, which delivers impressive performance while operating at low power levels. This combination makes the XTX 820 suitable for environments where energy efficiency is essential. The Atom processor allows for seamless multitasking and support for demanding applications without compromising on thermal efficiency.

In terms of memory, the XTX 820 supports a range of configurations, accommodating both DDR2 and DDR3 memory types. With a maximum of up to 4GB of onboard memory, this module ensures that applications can run smoothly and efficiently across various tasks. The flexibility in memory options enables developers to tailor their designs according to specific project needs.

Connectivity is another strong suit of the XTX 820. The module comes with multiple I/O interfaces that enhance its utility in various applications. It features USB, Serial, and Parallel ports, along with support for LVDS display and audio interfaces. This diverse range of connectivity options allows the XTX 820 to integrate easily with a variety of systems and devices, facilitating seamless data transfer and communication.

Security is increasingly critical in embedded systems, and Ampro has integrated robust security features into the XTX 820. This includes support for hardware-based security solutions, which can protect sensitive data and prevent unauthorized access. Such characteristics make the module a suitable choice for industries where data integrity is paramount.

Furthermore, the XTX 820 boasts an impressive range of environmental operating conditions. It is designed to function in extreme temperatures, making it suitable for outdoor and industrial applications where fluctuations in temperature can be a concern.

In conclusion, the Ampro Corporation XTX 820 embedded computing module emerges as a versatile platform that combines performance, memory flexibility, robust connectivity, and enhanced security features. Its design is tailored to meet the demands of various industries, making it a reliable choice for developers looking for advanced embedded solutions.