Analog Devices 82-003536-01 manual JTAG Emulators, Evaluation Tools

Models: 82-003536-01

1 114
Download 114 pages 63.01 Kb
Page 84
Image 84
JTAG Emulators

Evaluation Tools

The Blackfin/SHARC USB EZ-Extender daughter board features:

USB 2.0 interface – PLX Technology NET2272 device

USB driver and application code

CE certified

JTAG Emulators

JTAG (Joint Test Action Group) is defined by the IEEE 1149.1 standard for a test access port for testing electronic devices. This standard defines a method for serially scanning the I/O status of each pin on the device as well as controlling internal operation of the device.

Boundary-scan testing was developed in the mid 1980s as the JTAG inter- face to solve physical access problems on PCBs caused by increasingly crowded assemblies due to novel packaging technologies. Boundary-scan embeds test circuitry at chip level to form a complete board-level test pro- tocol. With boundary-scan—industry standard IEEE 1149.1 since 1990—you can access the most complex assemblies for testing, debugging, in-system device programming, and diagnosing hardware problems.

SHARC processors are equipped with a JTAG port and thus support the IEEE 1149.1 standard for system test.

Through the JTAG port, you can run and halt the processor remotely. The internal and external processor memory can be read or written, and breakpoints can be set.

Most development boards include some built-in JTAG emulation cir- cuitry. Your own hardware, most likely, does not contain this circuitry.

2-54

Getting Started With SHARC Processors

Page 84
Image 84
Analog Devices 82-003536-01 manual JTAG Emulators, Evaluation Tools