The
The attenuation is controlled through a differential, high imped- ance (15 MΩ) input, with a scaling factor which is laser trimmed to 32 dB per volt, that is, 31.25 mV/dB. Each of the two amplifiers has its own control interface. An internal band- gap reference ensures stability of the scaling with respect to supply and temperature variations, and is the only circuitry common to both channels.
When the differential input voltage VG = 0 V, the attenuator “slider” is centered, providing an attenuation of 21.07 dB, thus resulting in an overall gain of 20 dB (=
20 dB (= 0.625 × 32), to 0 dB; when set to +625 mV, the gain is increased by 20 dB, to 40 dB. When this interface is over- driven in either direction, the gain approaches either
The gain of the AD600 can thus be calculated using the follow- ing simple expression:
Gain (dB) = 32 VG + 20 | (1) |
where VG is in volts. For the AD602, the expression is: |
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Gain (dB) = 32 VG + 10 | (2) |
Operation is specified for VG in the range from
For example, the
It is a simple matter to include a voltage divider to achieve other scaling factors. When using an
Later, we will discuss how the two sections of an AD600 or AD602 may be cascaded, when various options exist for gain control.
Each amplifier section of the AD600 and AD602 is equipped with a signal gating function, controlled by a TTL or CMOS logic input (GAT1 or GAT2). The ground references for these inputs are the signal input grounds A1LO and A2LO, respec- tively. Operation of the channel is unaffected when this input is LO or left
AD600/AD602
A special circuit technique is used to provide rejection of volt- ages appearing between input grounds (A1LO and A2LO) and output grounds (A1CM and A2CM). This is necessary because of the “op amp” form of the amplifier, as shown in Figure 1.
The feedback voltage is developed across the resistor RF1 (which, to achieve low noise, has a value of only 20 Ω). The voltage developed across this resistor is referenced to the input common, so the output voltage is also referred to that node.
To provide rejection of this common voltage, an auxiliary ampli- fier (not shown) is included, which senses the voltage difference between input and output commons and cancels this error component. Thus, for zero differential signal input between A1HI and A1LO, the output A1OP simply follows the voltage at A1CM. Note that the range of voltage differences which can ex- ist between A1LO and A1CM (or A2LO and A2CM) is limited to about ± 100 mV. Figure 50 (one of the typical performance curves at the end of this data sheet) shows typical common- mode rejection ratio versus frequency.
ACHIEVING 80 dB GAIN RANGE
The two amplifier sections of the
There are several options in connecting the
Sequential Mode (Maximum S/N Ratio)
In the sequential mode of operation, the SNR is maintained at its highest level for as much of the gain control range possible, as shown in Figure 2. Note here that the gain range is 0 dB to 80 dB. Figure 3 shows the general connections to accomplish this. Both
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– dB | 65 |
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RATIO | 55 |
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S/N | 50 |
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| 0.0 | 0.5 | 1.0 | 1.5 | 2.0 | 2.5 | 3.0 |
VG
Figure 2. S/N Ratio vs. Control Voltage Sequential Control (1 MHz Bandwidth)
REV. A |