4. BIOS SETUP
SDRAM RAS Precharge TimeThis controls the idle clocks after issuing a precharge command to the SDRAM. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define].
SDRAM Cycle Time (Tras, Trc) [5T, 7T]This feature controls the number of SDRAM clocks used per access cycle. Configuration options: [5T, 7T] [6T, 8T]
SDRAM Address Setup Time [1T Delay]Configuration options: [No Delay] [1T Delay]
SDRAM Page Closing Policy [All Banks]This feature controls whether the graphic and memory controller hub will precharge one or all banks after a page miss. Configuration options: [One Bank] [All Banks]
CPU Latency Timer [Enabled]Configuration options: [Disabled] [Enabled]
Onboard VGA [Enabled]Leave on default setting if you want to use the onboard VGA. If this field is disabled, all Display Cache configurations will not be available. Configuration options: [Disabled] [Enabled]
Display Cache CAS Latency (DCCAS) [2T]Configuration options: [2T] [3T]
Display Cache RAS to CAS Delay [Determined by DCCAS]With the default setting [Determined by DCCAS], this field has the same configuration as Display Cache CAS Latency (DCCAS). Configuration options: [Determined by DCCAS] [2T]
Display Cache RAS Precharge Time [2T]Configuration options: [2T] [3T]
Display Cache Cycle Time (Tras, Trc) [5T, 8T]Configuration options: [5T, 8T] [7T, 10T]
Display Cache Paging Mode [Page Open Mode]Configuration options: [Page Open Mode] [Page Close Mode]
Display Cache Window Size [64MB]This feature allows you to select the size of mapped memory for AGP graphic data. Configuration options: [64MB] [32MB]
Chip Configuration
4. BIOS SETUP
ASUS P3W User’s Manual | 63 |