Appendix D: Default Configuration
Appendix D: Default Configuration
Table 1. Default Configuration
Reference | Name | Function | State | |
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SP1 | CC02 mode | For T89C51CC02/T89C5115 usage, allow to redirect the | Open | |
ISP signal to P1.0, for hardware conditions. | ||||
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SP2 | X2_44 | Connect PLCC44 Xtal2 to XTAL2 of the generic extension | Open | |
board | ||||
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SP3 | X2_52 | Connect PLCC52 Xtal2 to XTAL2 of the generic extension | Open | |
board | ||||
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JP1 | EA | ON : allows external execution | Open (OFF) | |
OFF: Internal code execution | ||||
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JP2 | MUTE | ON : Enable C51 generic extension board buzzer | Open (OFF) | |
OFF: Disable C51 generic extension board buzzer | ||||
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JP3 | CANRes | ON : Enable CAN terminator resistor | Open (OFF) | |
OFF: Disable CAN terminator resistor | ||||
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JP4 | RTS | ON : Enable RTS line to control ISP mode | Open (OFF) | |
OFF: Disable RTS line to control ISP mode | ||||
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JP5 | DTR | ON : Enable DTR line to drive MCU reset | Open (OFF) | |
OFF: Disable DTR line to drive MCU reset | ||||
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JP6 | Batt | ON : Enable Battery charge | Open (OFF) | |
OFF: Disable Battery charge | ||||
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