Power
Theory
±ODEP circuitry is used to simulate the thermal barri- ers between the interior of the output device die (immeasurable by normal means) and the time delay from heat generation at the die until heat dissipates to the thermal sensor. The combined effects of thermal history and instantaneous dynamic power level result in an accurate simulation of the actual thermal condi- tion of the output transistors.
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| POSITIVE |
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| +VOLTAGE | +LVA | HIGH SIDE |
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| TRANSLATOR | OUTPUT | |
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| NPN STAGE |
BGS |
| VGS | ERROR |
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| AMP |
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| OUTPUT |
| HIGH SIDE |
BALANCED |
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| DEVICE |
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| BIAS | |||
| EMULATION |
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INPUTS |
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| SERVO | ||
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| PROTECTION |
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| NEGATIVE | |
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| HIGH SIDE | ||
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| TRANSLATOR | OUTPUT | |
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| PNP STAGE |
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| MAIN NEGATIVE FEEDBACK (NFb) LOOP | |
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| POSITIVE |
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| LOW SIDE |
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| OUTPUT |
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| NPN STAGE |
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| LOW SIDE |
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| BIAS | |
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| DIODE | |
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| STRING |
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| NEGATIVE |
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| INVERTING | LOW SIDE |
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| BRIDGE | OUTPUT |
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| BALANCE | PNP STAGE |
Figure 3. Typical Crown Amplifier Basic Block Diagram (One Channel Shown)
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