CY62136VN MoBL®
2-Mbit (128K x 16) Static RAM
Features
•Temperature Ranges
—Industrial:
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•High speed: 55 ns
•Wide voltage range:
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•Easy memory expansion with CE and OE features
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•Automatic
•CMOS for optimum speed/power
•Available in standard
Functional Description[1]
The CY62136VN is a
portable applications such as cellular telephones. The device also has an automatic
Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the Truth Table at the back of this data sheet for a complete description of read and write modes.
Logic Block Diagram
PinConfigurations[3]
A10
A9
DATA IN DRIVERS
TSOP II (Forward)
Top View
A4 |
| 1 | 44 |
| A5 |
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128K x 16 RAM Array
SENSE AMPS
I/O0 – I/O7
I/O8 – I/O15
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| 3 | 42 |
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| 4 | 41 |
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| 5 | 40 |
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| 6 | 39 |
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I/O 0 |
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I/O | 1 |
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I/O | 2 |
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I/O 3 |
| 10 | 35 |
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VCC |
| 11 | 34 |
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| 12 | 33 |
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I/O | 4 |
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I/O | 5 |
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I/O |
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I/O 76 |
| 15 | 29 |
| I/O 89 |
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WE |
| 17 | 28 |
| NC |
A16 |
| 18 | 27 |
| A8 |
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A15 |
| 19 | 26 |
| A9 |
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A14 |
| 20 | 25 |
| A10 |
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A13 |
| 21 | 24 |
| A11 |
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A12 |
| 22 | 23 |
| NC |
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Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation | • | 198 Champion Court • San Jose, CA | • | |
Document #: |
| Revised August 3, 2006 |
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