Cypress Switching Characteristics, CY7B991-7, CY7B992-7, CY7B991 CY7B992, Parameter, Unit

CY7B991

CY7B992

Switching Characteristics

Over the Operating Range[2, 13] (continued)

				CY7B991–7				CY7B992–7
Parameter	Description										Unit
			Min		Typ	Max	Min		Typ	Max
fNOM	Operating Clock	FS = LOW[1, 2]	15			30	15			30	MHz
	Frequency in MHz
		FS = MID[1, 2]	25			50	25			50
		FS = HIGH[1, 2]	40			80	40			80[15]
tRPWH	REF Pulse Width HIGH		5.0				5.0				ns
tRPWL	REF Pulse Width LOW		5.0				5.0				ns
tU	Programmable Skew Unit						See Table 1
tSKEWPR	Zero Output Matched-Pair Skew				0.1	0.25			0.1	0.25	ns
	(XQ0, XQ1)[16, 17]
tSKEW0	Zero Output Skew (All Outputs)[16, 18]				0.3	0.75			0.3	0.75	ns
tSKEW1	Output Skew (Rise-Rise, Fall-Fall, Same				0.6	1.0			0.6	1.0	ns
	Class Outputs)[16, 19]
tSKEW2	Output Skew (Rise-Fall, Nominal-Inverted,				1.0	1.5			1.0	1.5	ns
	Divided-Divided)[16,19]
tSKEW3	Output Skew (Rise-Rise, Fall-Fall, Different				0.7	1.2			0.7	1.2	ns
	Class Outputs)[16, 19]
tSKEW4	Output Skew (Rise-Fall, Nominal-Divided,				1.2	1.7			1.2	1.7	ns
	Divided-Inverted)[16,19]
tDEV	Device-to-Device Skew[14, 22]					1.65				1.65	ns
tPD	Propagation Delay, REF Rise to FB Rise		–0.7		0.0	+0.7	–0.7		0.0	+0.7	ns
tODCV	Output Duty Cycle Variation[22]		–1.2		0.0	+1.2	–1.5		0.0	+1.5	ns
tPWH	Output HIGH Time Deviation from 50%[23, 24]					3				5.5	ns
tPWL	Output LOW Time Deviation from 50%[23, 24]					3.5				5.5	ns
tORISE	Output Rise Time[23, 25]		0.15		1.5	2.5	0.5		3.0	5.0	ns
tOFALL	Output Fall Time[23, 25]		0.15		1.5	2.5	0.5		3.0	5.0	ns
tLOCK	PLL Lock Time[26]					0.5				0.5	ms
tJR	Cycle-to-Cycle Output	RMS[14]				25				25	ps
	Jitter
		Peak-to-Peak[14]				200				200	ps

Document Number: 38-07138 Rev. *B Page 10 of 19

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