Cypress CY7C1346H manual Switching Waveforms continued, Read/Write Cycle Timing17, 19, Page 13 of

CY7C1346H

Switching Waveforms (continued)

Read/Write Cycle Timing[17, 19, 20]

			tCYC
CLK
		tCH	tCL
	tADS	tADH
ADSP
ADSC
	tAS	tAH
ADDRESS	A1	A2
BWE,
BW[A:D]
	tCES	tCEH
CE
ADV
OE
			tCO

A3 A4

tWES tWEH

tDS tDH

A5 A6

Data In (D)	High-Z	t	tOEHZ
		CLZ
Data Out (Q)	High-Z	Q(A1)	Q(A2)

D(A3)

tOELZ

Q(A4) Q(A4+1) Q(A4+2) Q(A4+3)

D(A5) D(A6)

Back-to-Back READs

Single WRITE	BURST READ
DON’T CARE	UNDEFINED

Back-to-Back

WRITEs

Notes:

19.The data bus (Q) remains in High-Z following a Write cycle unless an ADSP, ADSC, or ADV cycle is performed.

20.GW is HIGH.

Document #: 38-05672 Rev. *B Page 13 of 16

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