Delta Electronics ND Series manual Output Capacitance, Voltage Margining Adjustment, Power Good

FEATURES DESCRIPTIONS (CON.)

The output can also be set by an external voltage connected to trim pin as shown in Figure 28

Figure 28: output voltage trim with voltage source

To use voltage trim, the trim equation for the ND50 is (please refer to Fig.28):

Vout is the desired output voltage

Vt is the external trim voltage

Rs is the resistance between Trim and Ground (in KΩ)

Rt is the resistor to be defined with the trim voltage (in KΩ)

Below is an example about using this voltage trim equation:

Example:

If Vt=1.25V, desired Vout=2.5V and Rs=1kΩ

Output Capacitance

an external output capacitor(min 680uF) is required for stable operation.

Voltage Margining Adjustment

Output voltage margin adjusting can be implemented in the ND modules by connecting a resistor, Rmargin-up, from the Trim pin to the Ground for margining up the output voltage. Also, the output voltage can be adjusted lower by connecting a resistor, Rmargin-down, from the Trim pin to the voltage source Vt. Figure 29 shows the circuit configuration for output voltage margining adjustment.

Figure 29: Circuit configuration for output voltage margining

Reflected Ripple Current and Output Ripple and Noise Measurement

The measurement set-up outlined in Figure 30 has been used for both input reflected/ terminal ripple current and output voltage ripple and noise measurements on ND series converters.

Power Good

The converter provides an open collector signal called Power Good. This output pin uses positive logic and is open collector. This power good output is ale to sink 5mA and set high when the output is within ±10% of output set point. The power good signal is pulled low when output is not within ±10% of Vout or Enable is OFF.

DS_ND12S10A_07172008

Cs=270μF*1, Ltest=1.4uH, Cin=270μF*2. Cout=680uF*4

Figure 30: Input reflected ripple/ capacitor ripple current and output voltage ripple and noise measurement setup for ND50

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