Digi NS9210 Configuration pins CPU

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Configuration pins — CPU

None of the 64 GPIO pins on connector X2 disturb CPU boot strap functions. The

boot strap functions are controlled by address signals; the user can not disturb boot

strap functions from outside, if the module configuration signals, described below,

are correctly configured.

Default module

CPU

configuration

The user has access to six configuration signals:

LITTLE#/BIG_ ENDIAN which allows the user to select the endianess of the

module

OCD_EN# which allows the user to activate on-chip debugging

SW_CONF [3:0] which are reserved for the user; the user software can read out

these signals through the GEN ID register (@ 0xA090_0210).

Contents

Main Page Contents . . . . . . . Page Page Page Digi information Page About the Module T Features and functionality Module pinout Pinout legend: Type X1 pinout Page Page Page X2 pinout Page Page Page Page Page Page Page Configuration pins CPU Configuration pins Module Clock generation Boot process Chip selects SDRAM banks Multiplexed GPIO pins Page Page Page Page Page Interfaces Power About the Development Board T Page Page User interface Switches and pushbuttons Page Serial Port B MEI configuration switches, S1 Use S1 to configure the line interface for serial port B MEI: Jumpers Jumper functions Battery and Battery Holder LEDs Page Serial UART ports Page Page Page I2C interface The I/O expander is a Philips PCA9554D at I2C address 0x20 / 0x21. The pins are allocated as shown: SPI interface Pin allocation SPI connector pins are allocated as shown: Current Measurement Option JTAG interface PoE module connectors - IEEE802.3af Page Ethernet interface RJ-45 pin allocation, X19 RJ-45 connector pins are configured as shown: Peripheral (expansion) headers Page Module and test connectors X10 pinout *USB signals are reserved for future use. X11 pinout *USB signals are reserved for future use. X20 pinout X21 pinout Page Appendix A:Specifications T Environmental specifications Mechanical specifications Safety statements A Power requirements Typical module current / power measurements Typical power save module / JumpStart board current / power consumption measurements Page Layout recommendation BOTTOM View TOP View SIDE View Page Reset and edge sensitive input timing requirements t Page Appendix B:Certifications T FCC Part 15 Class B Radio Frequency Interface (RFI) (FCC 15.105) Labeling Requirements (FCC 15.19) B Modifications (FCC 15.21) Industry Canada Declaration of Conformity B International EMC Standards The NS9210 Processor Module meets the following standards: