RX − 8564 LC
12.2. Register table
Address [h] | Function | bit 7 | bit 6 | bit 5 | bit 4 | bit 3 | bit 2 | bit 1 | bit 0 | note |
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00 | Control 1 | TEST | 0 | STOP | 0 | TEST | 0 | 0 | 0 | ∗ 3 , ∗ 4 |
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01 | Control 2 | 0 | ⋅ | 0 | TI / TP | AF | TF | AIE | TIE | ∗ 4 , ∗ 5 |
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02 | Seconds | VL | 40 | 20 | 10 | 8 | 4 | 2 | 1 | ∗ 1 |
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03 | Minutes | ⋅ | 40 | 20 | 10 | 8 | 4 | 2 | 1 | ∗ 5 |
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04 | Hours | ⋅ | ⋅ | 20 | 10 | 8 | 4 | 2 | 1 | ∗ 5 |
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05 | Days | ⋅ | ⋅ | 20 | 10 | 8 | 4 | 2 | 1 | ∗ 5 |
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06 | Weekdays | ⋅ | ⋅ | ⋅ | ⋅ | ⋅ | 4 | 2 | 1 | ∗ 5 |
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07 | Months / Century | C | ⋅ | ⋅ | 10 | 8 | 4 | 2 | 1 | ∗ 5 |
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08 | Years | 80 | 40 | 20 | 10 | 8 | 4 | 2 | 1 |
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09 | Minute Alarm | AE | 40 | 20 | 10 | 8 | 4 | 2 | 1 |
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0A | Hour Alarm | AE | ⋅ | 20 | 10 | 8 | 4 | 2 | 1 | ∗ 5 |
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0B | Day Alarm | AE | ⋅ | 20 | 10 | 8 | 4 | 2 | 1 | ∗ 5 |
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0C | Weekday Alarm | AE | ⋅ | ⋅ | ⋅ | ⋅ | 4 | 2 | 1 | ∗ 5 |
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0D | CLKOUT frequency | FE | ⋅ | ⋅ | ⋅ | ⋅ | ⋅ | FD1 | FD0 | ∗ 2 , ∗ 5 |
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0E | Timer control | TE | ⋅ | ⋅ | ⋅ | ⋅ | ⋅ | TD1 | TD0 | ∗ 5 |
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0F | Timer | 128 | 64 | 32 | 16 | 8 | 4 | 2 | 1 |
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Note)
∗1.
∗2.
∗3.
∗4.
∗5.
During the initial
When doing this, be careful to avoid setting incorrect data as the date or time, as timed operations cannot be guaranteed if incorrect date or time data has been set.
During the initial
∗Since the value of other registers is undefined at this time, be sure to reset all registers before using them.
During the initial
∗If the CLKOE input pin is at high level ("H"), output from the CLKOUT output pin is at 32.768 kHz.
The two TEST bits for address 00 (Control 1) are for use by Seiko Epson Corporation.
When initializing, be sure to write "0". Afterward, be sure to write "0" whenever writing to these bits.
∗This device's operations are not guaranteed if "1" has been set to any of these bits. All bits marked with "0" should have a value of "0" after initialization.
All bits marked with “x” are
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