RX − 8564 LC

13.2.4.2. Operation example of repeated interrupt mode ( TI / TP = " 1 " )

•After an interrupt event has occurred, execution of the operation is automatically repeated continuously.

Fixed-cycle timer operation

starts

TE bit

(1)

Fixed-cycle timer operation in progress

 

" 1 "

Fixed-cycle timer operation stops

(10)

" 1 " " 0 "

TIE bit

 

 

(5)

 

 

 

 

 

/INT output

 

 

 

(6)

 

 

 

 

tRTN

TF bit

 

 

(3)

(4)

 

 

 

 

 

1st period

 

2nd period

Event

(1)

• • • 01 h →

00 h

(2)

 

occurs

(9)

tRTN

tRTN

 

(8)

∗Low level is held during tRTN, even if the TF bit is

cleared to zero.

3rd period

(7)

(11)

∗ TF bit value is held as "1" even if the TE bit is cleared to zero.

(10)

∗ As long as the TE bit value is "0", the countdown is

" 1 " " 0 "

Hi - z " L "

" 1 " " 0 "

∗The fixed-cycle timer function (countdown) starts when the TE bit value is changed from "0" to "1".

∗Before starting the fixed-cycle timer interrupt function each time, be sure to write a value (preset value/Reg-0F[h]) as the timer's down counter value (when TE = "0").

RTC's internal operation

Write operation

stopped and no events occur.

∗Before starting the fixed-cycle timer interrupt function each time, be sure to write a value (preset value/Reg-0F[h]) as the timer's down counter value (when TE = "0").

(Note) Note with caution that the preset value must be set or reset to enable correct operation.

∗Before entering operation settings, we recommend first clearing the TE bit to "0" and then clearing the TF and TIE bits to "0" in that order, so that all control-related bits are zero-cleared (= set to operation stop mode) to prevent hardware interrupts from occurring inadvertently while entering settings.

(1)When the TE bit value is changed from "0" to 1", the fixed-cycle timer's countdown begins.

(2)A fixed-cycle timer interrupt event starts a countdown based on the countdown period (source clock). When the count value changes from 01h to 00h, an interrupt event occurs.

∗After the interrupt event that occurs when the count value changes from 01h to 00h, the counter automatically reloads the preset value and again starts to count down. (Repeated operation)

(3)When a fixed-cycle timer interrupt event occurs, "1" is written to the TF bit.

(4)When the TF bit = "1" its value is retained until it is cleared to zero.

∗( 11 ) Even when the TE bit is cleared to zero, the TF bit value is retained as "1" and the /TIRQ pin status is not reset.

(5)If the TIE bit = "1" when a fixed-cycle timer interrupt occurs, /INT pin output goes low.

∗( 9 ) If the TIE bit = "0" when a fixed-cycle timer interrupt occurs, /INT pin output remains Hi-Z.

(6)Output from the /INT pin remains low during the tRTN period following each event, after which it is automatically cleared to Hi-Z status.

(7)When the next interrupt event occurs, the /INT is again set to low level ("L").

∗(4) In this operation example, the TF bit is not cleared to zero, so the "1" value is held.

(8)When /INT is at low level ("L"), it remains at low level during the tRTN period, even if the TF bit value is changed from "1" to "0".

(10) Changing the TE bit value from "1" to 0" stops the fixed-cycle timer's function (stops the countdown).

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ETM12E-01