RX − 8564 LC
13.2.2. Related registers for function of timer interrupts.Address [h] | Function | bit 7 | bit 6 | bit 5 | bit 4 | bit 3 | bit 2 | bit 1 | bit 0 |
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01 | Control 2 | 0 | ⋅ | 0 | TI / TP | AF | TF | AIE | TIE |
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0E | Timer control | TE | ⋅ | ⋅ | ⋅ | ⋅ | ⋅ | TD1 | TD0 |
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0F | Timer | 128 | 64 | 32 | 16 | 8 | 4 | 2 | 1 |
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∗Before starting the
(Note) Note with caution that the preset value must be set or reset to enable correct operation.
∗Before entering operation settings, we recommend first clearing the TE bit to "0" and then clearing the TF and TIE bits to "0" in that order, so that all
When a
TI / TP | Data | Description |
| 0 | [Level interrupt mode] |
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Write / Read |
| ∗ ) Another operation can be set via various bit settings. |
| 1 | [Repeated interrupt mode] |
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These bits specify the
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| /INT auto recovery time tRTN | ||
TD1, TD0 | TD1 |
| TD0 |
| Source clock | during repeated interrupt mode | ||
( bit 1 ) |
| ( bit 0 ) |
| Preset value |
| Preset value | ||
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| n = 1 |
| 1 < n |
| 0 | 0 | 4096 Hz | / 244.14 ∝ s cycle | 122 ∝ s |
| 244 ∝ s | |
W / R | 0 |
| 1 | 64 Hz | / 15.625 ms cycle | 7.813 ms |
| 15.625 ms |
1 | 0 | 1 Hz | / Updated per second | 15.625 ms |
| 15.625 ms | ||
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| 1 | 1 | 1/60 Hz | / Updated per minute | 15.625 ms |
| 15.625 ms |
∗1) During repeated interrupt mode (TI/TP bit = "1"), the auto recovery time tRTN (when the /INT pin is switched from low level to
∗2) The countdown when a
∗Since the internal clock is linked to updating of the seconds setting, if the timer is started at a clock time of 0.9 seconds, the first countdown will occur only 0.1 second later. (The second and subsequent countdowns will occur at the correct time interval.)
∗2) The countdown when a
∗Since the internal clock is linked to updating of the minutes setting, if the timer is started at a clock time of 50 seconds, the first countdown will occur only 10 seconds later. (The second and subsequent countdowns will occur at the correct time interval.)
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