Epson SED1278F/D manual 1/11 or 1/16 Duty Dot Matrix Drive, Description, Features, Block Diagram

PF282-07

SED1278F/D

Dot Matrix LCD Controller Driver

1/8, 1/11 or 1/16 Duty Dot Matrix Drive

ROM 240 characters

Built-in Character Generator ROM and RAM(RAM 8 characters )

Maximum Simultaneous Display of 80 Characters

(With extension LCD driver)

DESCRIPTION

The SED1278F/D is a dot matrix LCD controller/driver which is dedicated to character display. It is capable of displaying up to 80 characters under 4-bit/8-bit MPU control.

The built-in character generator ROM has an extended capacity of 240 different characters, each being generated in a 5 10 dots font compatible with a 1/11 duty. In addition, the SED1278F/D contains 64 bytes of character generator RAM in which the user can store 8 different characters, each consisting of 5 8 dots. These memory features offer high flexibility in character display.

The guaranteed minimum LCD driving voltage is 3V, and this makes the SED1278F/D suitable for driving low voltage LCDs.

FEATURES

Display RAM	80 bytes (80 characters)
Character generator ROM	240 characters (Able to 256 characters)
Character generator RAM	8 characters
Built-in CR oscillator, Built-in power-on reset circuit
Maximim display dimension	40 characters 2 lines, 80 characters 1 line
	(When accompanied with SED1181FLA/DLA, SED1681FOA/DOA)
1/8, 1/11 or 1/16 duty matirx drive (fixed by command)
2 flame AC wave-form drive
High-speed bus interface with 4-bit/8-bit MPU
Powerful display control instructions
Character	5	7 dots+Cursor line (5 8 dots also possible)
	5	10 dots+Cursor line
6 Kinds of character font	5V±10% (Logic)
Single power supply
Low LCD driving voltage		>
	VDD-V5= 3.0V
Package	SED1278F: QFP5-80pin (plastic)
	SED1278D: Die form (Al pad)

BLOCK DIAGRAM

								OSC1 OSC2
		Instruction Decoder			Cursor/
					Brink Control
	Buffer	Instruction Register		Address		Refresh Address Counter		Oscillation
DB0				Counter ACC				Circuit
		8				7
~									XSCL
DB7	I/O
		Data Register		7	M	P X	Timing Generator		LP
									FR
		8			Display Data RAM
E	Control				DD RAM		Shift Register 16 Bits
					80 Bytes
R/W
	I/O						Common Driving
RS							Output Circuit		COM1
			M P X			8			~
									COM16
									SEG1
VDD			Character		Character				~
									SEG40
		8	Generator		Generator		Segment Driving
VSS			RAM		RAM
							Output Circuit
V1			(CG	RAM)	(CG	RAM)
			64 Bytes		5 10	240 Byts
V2				5	5
V3							Latch Circuit
V4				M P X				40 Bits
V5
					5
				Parallel/Serial			Shift Register		D0
				Data Converter				40 Bits

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