Hardware Design
Table 4-2. J2 Interface Header
Pin number | Signal |
|
|
1 | +5V |
|
|
2 | PTC2 |
|
|
3 | PTC0 |
|
|
4 | PTA0 |
|
|
5 | GND |
|
|
6 | PTA1 |
|
|
Dimmable Light Ballast with Power Factor Correction, Rev. 1
32 | Freescale Semiconductor |
Hardware Design
Pin number | Signal |
|
|
1 | +5V |
|
|
2 | PTC2 |
|
|
3 | PTC0 |
|
|
4 | PTA0 |
|
|
5 | GND |
|
|
6 | PTA1 |
|
|
Dimmable Light Ballast with Power Factor Correction, Rev. 1
32 | Freescale Semiconductor |