CHAPTER 2

System Features

This chapter explains the following technical aspects, including features and structures.

2.1Hardware Configuration

This section explains the hardware configuration, which includes the following items:

CPU

Memory Subsystem

I/O Subsystem

System Bus

System Control

2.1.1CPU

The SPARC Enterprise M8000/M9000 Servers use the SPARC64 VI CPU, a proprietary high-performance multi-core processor. On-chip L2 cache memory minimizes memory latency.

An instruction retry function has been implemented so that operation can be continued by retrying an instruction for which an error has been detected.

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