HP Small Form Factor PC dc5850 Processor/Memory Subsystem, 3.1Introduction

3

Processor/Memory Subsystem

3.1Introduction

This chapter describes the processor/memory subsystem. This systems support the AMD Phenom, Athlon, and Sempron processor families. As shown in Figure 3-1, these processors use an integrated DDR2 memory controller and communicate with the chipset through the HyperTranport interface (I/F).

XMM1 XMM3

DIMM DIMM

AMD Processor
Core(s)		Channel A
	DDR2
		Channel B
L2 Cache	Controller
HyperTransport I/F

DIMM DIMM

North Bridge

XMM2 XMM4

Figure 3-1. Processor/Memory Subsystem Architecture

This chapter includes the following topics:

■AMD processors (3.2)

■Memory subsystem (3.3)

Technical Reference Guide www.hp.com 3-1