Application Note
(Includes Differences for 970FX to 970MP)
IBM PowerPC® 970MP RISC Microprocessor Preliminary
5. Design Enhancements for PowerPC 970MP
Page 14 of 25
AppNote_970FX-MP_Differences_Body.fm.1.0
November 15, 2006
are transmitting ‘0’ bits. This process repeats itself until the 16 consecutive ‘1’ bits have been walked in
sequence across all channels. The electrical shorts test mode is enabled by setting the following I/O SCOM
mode register 0 bits: ESTMODE to ‘1’, WIAP to ‘1’, and RDTMODE to ‘1’. Once enabled the shorts test will
create the sequential patterns across all data channels, and then will stop. However, if any of the values of
the three mode bits that enable this mode are changed, the test will be terminated immediately. Once a test is
complete the SCOM mode bit WIAP must be deasserted and reasserted to start a new test.
The electrical shorts test also has a feature controlled by SCOM mode bit ESTONE. Holding ESTONE at a ‘1’
creates the pattern sequence previously described. Forcing ESTONE to a ‘0’ reverses the values of the
pattern sequence, essentially creating a walking ‘0’ sequence across a field of data 1’s.
5.2.2.3 Receiver Electrical Shorts Test (REST)
The transmitter mode called electrical shorts test, which creates a walking ‘1’ or walking ‘0’ pattern, is
discussed in the transmitter description. For the test to be performed correctly both the transmitter and
receiver within the link must have the same ESTONE value applied. Mismatched ESTONE values results in a
failing test.
The walking pattern appears on the data channels as the walking data value on the channel under test,
surrounded by the opposite data value on all other channels in the data field. The walking data value is held
on a given channel for 16 bit times, after which the data value for that channel is returned to the data value of
the field, and the walking value is applied to the next channel for 16 bit times. The process is continued until
all channels have been tested.
Each channel is independently forced to a ‘1’ while the field is ‘0’. Each time a channel is tested by applying a
data ‘1’ the receiver checks to see that the channel under test, and only the channel under test, observes the
‘1’. If at any time more than one channel is received as a ‘1’, a short between the channel under test and other
channel(s) observing a ‘1’ exists. If any channel under test fails to observe the ‘1’ an error on that channel is
indicated.
The following is the process for performing the shorts test:
• 1. Configure receiver in bypass mode, SCOM mode reg BYPASS=1.
• 2. Force transmitter to send data ‘0’ on all channels if ESTONE=1, or send data ‘1’ on all channels if
ESTONE=0.
• 3. Wait for receiver to be flushing 0’s or 1’s, as appropriate.
• 4. Start receiver SCOM mode reg ESTMODE and RIAP set active.
• 5. Start transmitter SCOM mode reg ESTMODE and WIAP set active.
• 6. Receiver status reports errors if test fails.
Note that the link does not require IAP training before the shorts test is run. However, for the test to be
successful the receiver must be configured in bypass mode which flushes data through the FIFO within the
receiver. This bypass mode is entered by forcing the SCOM mode register BYPASS bit to ‘1’ before the test is
initiated. The receiver initiates the test by observing all received data channels, and samples data on all chan-
nels after the leading edge of the first data transition on channel 0 is observed. This creates a sampling
strobe approximately in the center of the 16 bits of data on the channel under test. The checking procedure
within the receiver expects the channel under test to increment from channel 0 through channel 47.