Icom IC-M88 4-3PLL CIRCUIT (MAIN UNIT), 4-4POWER SUPPLY CIRCUITS, 4-3-1GENERAL, VOLTAGE LINES, • PLL CIRCUIT, 4-3-3TX AND RX VCO CIRCUITS (MAIN UNIT)

4-3 PLL CIRCUIT (MAIN UNIT)

4-3-1 GENERAL

The PLL circuit provides stable oscillation of the transmit frequency and receive 1st LO frequency. The PLL output compares the phase of the divided VCO frequency to the reference frequency. The PLL output frequency is controlled by the divided ratio (N-data) of a programmable divider. IC1 is a PLL IC which controls both VCO circuit for TX and RX.

The PLL circuit, using a one chip PLL IC (IC1), directly generates the transmit frequency and receive 1st IF frequency with VCOs. The PLL sets the divided ratio based on serial data from the CPU on the LOGIC unit and compares the phases of VCO signals with the reference oscillator frequency. The PLL IC detects the out-of-step phase and output from the pin 6 for TX and RX. The reference frequency (15.3 MHz) is oscillated at X1.

4-3-2 TX AND RX LOOP CIRCUITS (MAIN UNIT)

The generated signal at the TX-VCO circuit (Q51, D35 –D38, L34, L51, C32, C33, C52–C54) or RX-VCO (Q41, D31–D34, L32, L41, C31, C41–C43) enters the PLL IC (IC1, pin 8) and is divided at the programmable divider section and is then applied to the phase detector section.

The phase detector compares the input signal with a reference frequency, and then outputs the out-of-phase signal (pulse-type signal) from pin 6.

4-4 POWER SUPPLY CIRCUITS

VOLTAGE LINES

LINEDESCRIPTION

HV The voltage from the attached battery pack.

The same voltage as the HV line (battery voltage) which is controlled by the power switch (VR unit; [OFF/VOL] control).

VCC The output voltage is applied to the pre-drive (MAIN unit; Q101), power amplifier (MAIN unit; Q111), CPU5V and M5V regulator circuits (LOGIC unit; IC551 and Q551–Q553).

Common 5 V converted from the VCC line by the CPU5V regulator circuit (LOGIC unit; IC551).

CPU5V The output voltage is applied to the CPU (LOGIC unit; IC661), RESET circuit (LOGIC unit; IC581),

etc.

Common 5V converted from the VCC line by the M5V regulator circuit (LOGIC unit; Q551–Q553).

M5V The output voltage is applied to R5V, T5V, V5V and S5V regulator circuits (LOGIC unit; Q322, Q323, Q321 and Q561).

Receive 5V converted from the M5V line by the R5V regulator circuit (MAIN unit; Q322).

R5V The regulated voltage is applied to the 1st mixer circuit (MAIN unit; Q191), RF and IF amplifiers (MAIN unit; Q165, Q211).

The pulse-type signal is converted into DC voltage (lock voltage) at the loop filter (R17–R19, C16–C19), and then applied to varactor diodes (TX; D35–D38, RX; D31–D34) of the TX-VCO and RX-VCO to stabilize the oscillated frequency.

T5V

Transmit 5V converted from the M5V line by the T5V regulator circuit (MAIN unit; Q222).

The regulated voltage is applied to the buffer amplifier (MAIN unit; Q91).

Common 5V converted from the M5V line by

4-3-3 TX AND RX VCO CIRCUITS (MAIN UNIT)

The VCO circuit from Q41 (RX) and Q5 (TX) are buffer amplified at the Q61 and Q62, and then sent to the TX/RX

V5V

the V5V regulator circuit (MAIN unit; Q321). The regulated voltage is applied to the ripple filter circuit (Q47).

Common 5V converted from the M5V line by the S5V regulator circuit (LOGIC unit; Q561).

swtich (D91, D92). The receive LO signal is applied to the 1st mixer circuit (Q191) through an attenuator (L203, R203 –R206, C202, C203), and the transmit signal is applied to the buffer amplifier (Q91). A portion of the VCO output is reapplied to the PLL IC (IC1, pin 8) via the Q71.

The regulated voltage is applied to the microphone S5V amplifier (LOGIC unit; IC471), limit amplifier (LOGIC unit; IC491), LCD back light (LOGIC unit;

DS651–DS654), etc.

• PLL CIRCUIT

S5V				RX VCO
		Q81
	Q82
									D91 to transmitter circuit
VCOS				Q41, D31 D34			Buffer
						Buffer	Q62		to the 1st mixer circuit
				TX VCO
VCO SWITCH		FM				Q61	Buffer		D92
				Q51, D35 D38
		MOD.					Q71
		D39
		Loop				IC1 MB15A02PFV			LPF
		filter
			5	Phase	Programmable		Prescaler	8
				detector	counter
	"2nd LO" signal (30.6 MHz)
								11	PLSTBO
	to the FM IF IC (IC231, pin 2)		2	Programmable
						Shift register		10
		2		divider				9	SDATAO
		Q221							SCLKO
			1
		X1
		15.3 MHz

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