User’s Manual
2.4.2.1.4 Flat Panel LVDS Signals
| Signal |
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| Signal Description |
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| BIASON |
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| Controls panel contrast voltage. |
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| DIGON | Controls panel digital power. | |||
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| ENBKL# |
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| Controls backlight power enable. |
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| I2C_DAT, I2C_CLK |
| I2C interface for panel parameter EEPROM. This EERPOM is mounted on the | ||
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| LVDS receiver. The data in the EEPROM allows the EXT module to automatically | |||
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| set the proper timing parameters for a specific LCD panel. |
Signal | Signal Description |
LPC_FRAME# | LPC frame indicates the start of an LPC cycle |
LPC_AD[0:3] | LPC multiplexed address, command and data bus |
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LPC_DRQ[0:1]# | LPC serial DMA request |
LPC_CLK | LPC clock output - 33MHz nominal |
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LPC_SERIRQ | LPC serial interrupt |
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