1.4.15Shared Initialization Control (Word 13h)
This word controls general initialization values.
Table 11. | Shared Initialization Control (Word 13h) | ||||
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| Bit | Name | Default |
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| Valid Indication | |
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| This is a | |
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| MAC. If this field does not equal 10b, the MAC does not read the | |
| 15:14 | SIGN | 10b | NVM data and uses default values for device configuration. | |
| 00b = Invalid NVM. | ||||
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| 01b = Invalid NVM. | |
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| 10b = Valid NVM present. | |
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| 11b = Invalid NVM. | |
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| 13:11 | Reserved | 010b | These bits are reserved and should be set to 010b. | |
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| 10 | Reserved | 1b | Reserved. Always set to 1b. | |
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| For ICH8 designs that support an ACBS implementation using LAN | |
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| Power Control (LAN_PHYPC), this bit enables or disables PHY power | |
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| down. | |
| 9 | PHY PD Ena | 1b | 0b | = PHY power down feature is disabled. |
| 1b | = PHY power down feature is enabled to power down at DMoff/ | |||
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| D3 without Wake on LAN. | |
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| This bit is loaded to the PHY Power Down Enable bit in the | |
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| CTRL_EXT register. | |
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| 8 | Reserved | 0b | This bit is reserved and should be set to 0b. | |
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| This field indicates the PHY device type. | |
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| 00b = 82566 PHY - GLCI mode | |
| 7:6 | PHYT | 00b | 01b = Reserved | |
| 10b = 82562V PHY - PCIe mode, LCI mode | ||||
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| 11b = Reserved | |
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| This field is reflected in the PHYTYPE field in the Status register. | |
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| 5 | Reserved | 0b | Reserved. Must be set to 0b. | |
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| Force Speed Enable | |
| 4 | FRCSPD | 0b | 0b | = Normal operation. |
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| 1b | = Use ICH8 speed. |
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| Force Duplex | |
| 3 | FD | 0b | 0b | = Normal operation. |
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| 1b | = Use ICH8 speed. |
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| This bit is loaded to the CTRL_EXT.EnaKumCK16 bit and enables | |
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| the reduction of the internal JCLK to | |
| 2 | CLK_CNT_1_16 | 1b | NJCLK at the GLCI interface in Gigabit Ethernet mode. | |
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| 0b | = Reduction is disabled. |
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| 1b | = Reduction is enabled. |
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| This bit enables the automatic reduction of DMA frequency. It is | |
| 1 | CLK_CNT_1_4 | 0b | mapped to STATUS[31]. | |
| 0b | = Automatic reduction disabled. | |||
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| 1b | = Automatic reduction enabled. |
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| Dynamic Clock |
| Dynamic Clock Gating | |
| 0 | 1b | 0b | = Disable. | |
| Gating | ||||
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| 1b | = Enable. | |
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13
