LED 0 and 2 Configuration Defaults (Word 18h)

ICH8—NVM Information Guide

Table 17.

LED 0 and 2 Configuration Defaults (Word 18h)

 

 

 

 

 

 

 

 

 

 

Bit

 

Name

Default

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

This bit indicates the initial value of the LED0_BLINK field.

 

7

LED0 Blink

1b

0b = LED0 is non-blinking (recommended).

 

 

 

 

 

 

 

1b = LED0 is blinking.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

This bit indicates the initial value of the LED0_IVRT field.

 

6

LED0 Invert

0b

0b = LED0 has an active low output.

 

 

 

 

 

 

 

1b = LED0 has an active high output.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

This bit define the LED0 blink mode:

 

 

 

 

 

 

 

0b = Blink at 200 ms on and 200 ms off.

 

5

LED0 Blink Mode

0b

1b = Blink at 83 ms on and 83 ms off.

 

 

 

 

 

 

 

Note: This field initializes the GLOBAL_BLINK_MODE field in the

 

 

 

 

 

 

 

LEDCTL register.

 

 

 

 

 

 

 

 

 

4

Reserved

0b

This bit is reserved and should be set to 0b.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

These bits represent the initial value of the LED0_MODE field,

 

3:0

LED0 Mode

0100b

which specifies the event, state, or pattern displayed on LED0

 

 

 

 

 

 

 

(Link/Activity) output. Table 16 defines the values for LED0 Mode.

 

 

 

 

 

 

 

 

 

Table 16, “LED Modes” above summarizes the LED modes defined in bits 3:0 of this

 

word.

 

 

 

 

 

1.4.21

Future Initialization Word 1 (Words 19h)

 

 

 

 

 

 

 

 

 

 

Bit

 

Name

 

Default

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

This field is loaded to bits 15:0 of the FEXTNVM register.

 

 

15:0

 

Reserved

 

X

For the 82562V, must be set to 301h.

 

 

 

 

For 82566 SKUs that include ACBS, must be set to 181h.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

For 82566 SKUs without ACBS, must be set to 301h.

 

 

 

 

 

 

1.4.22

Future Init Word 2 (Word 1Ah)

 

 

 

 

 

 

 

 

 

Bit

 

Name

 

Default

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reserved

 

 

 

 

 

 

 

This field is loaded to bits 15:0 of the FEXTNVM register.

 

 

15:0

 

Reserved

 

X

For ICH8, set these bits to 0800h.

 

 

 

 

 

 

 

 

 

 

 

 

For ICH8M:

 

 

 

 

 

 

 

All 82566 SKUs that include ACBS, must be set to 0803h.

 

 

 

 

 

 

 

All 82566 SKUs without ACBS, must be set to 2803h.

 

 

 

 

 

 

 

 

17

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Intel 8 LAN 1.4.21, Future Initialization Word 1 Words 19h, 1.4.22, Future Init Word 2 Word 1Ah, ICH8-NVMInformation Guide